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/Zephyr-latest/dts/arm/infineon/cat1a/mpns/
DCYB06445LQI_S3D42.dtsi12 reg = <0x10000000 0x70000>;
/Zephyr-latest/boards/aspeed/ast1030_evb/
Dast1030_evb.dts22 reg = <0 DT_SIZE_K(448)>, <0x70000 DT_SIZE_K(320)>;
/Zephyr-latest/dts/bindings/mtd/
Datmel,sam-flash.yaml35 reg = <0x400e0a00 0x200>;
45 reg = <0x400000 0x100000>;
69 boot_partition: partition@0 {
71 reg = <0x0 0x10000>;
76 reg = <0x10000 0x70000>;
81 reg = <0x80000 0x70000>;
86 reg = <0xf0000 0x100000>;
/Zephyr-latest/boards/telink/tlsr9518adk80d/
Dtlsr9518adk80d.dts25 pwm-0 = &pwm0;
56 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
87 reg = <0x00000000 0x00020000>;
91 reg = <0x00080000 0x00020000>;
95 reg = <0x20000000 0x100000>;
102 boot_partition: partition@0 {
104 reg = <0x00000000 0x10000>;
107 label = "image-0";
108 reg = <0x10000 0x70000>;
112 reg = <0x80000 0x70000>;
[all …]
/Zephyr-latest/soc/espressif/esp32s2/
Dmemory.h18 * - 0x3ffeab00 - 0x3fffc410: Shared buffers, used in UART/USB/SPI download mode only
19 * - 0x3fffc410 - 0x3fffe710: CPU stack, can be reclaimed as heap after RTOS startup
20 * - 0x3fffe710 - 0x40000000: ROM .bss and .data (not easily reclaimable)
23 * buffers area (0x3fffc410). For alignment purpose we shall use value (0x3fce9700).
27 * Used to convert between 0x4002xxxx and 0x3ffbxxxx addresses.
29 #define IRAM_DRAM_OFFSET 0x70000
30 #define DRAM_BUFFERS_START 0x3ffea400
31 #define DRAM_BUFFERS_END 0x3fffc410
32 #define DRAM_ROM_CPU_STACK_START 0x3fffc410
33 #define DRAM_ROM_BSS_DATA_START 0x3fffe710
[all …]
/Zephyr-latest/soc/altr/qemu_nios2/include/
Dsystem.h53 #define ALT_CPU_BIG_ENDIAN 0
54 #define ALT_CPU_BREAK_ADDR 0x00200820
58 #define ALT_CPU_CPU_ID_VALUE 0x00000000
60 #define ALT_CPU_DATA_ADDR_WIDTH 0x17
61 #define ALT_CPU_DCACHE_LINE_SIZE 0
62 #define ALT_CPU_DCACHE_LINE_SIZE_LOG2 0
63 #define ALT_CPU_DCACHE_SIZE 0
64 #define ALT_CPU_EXCEPTION_ADDR 0x00400020
65 #define ALT_CPU_FLASH_ACCELERATOR_LINES 0
66 #define ALT_CPU_FLASH_ACCELERATOR_LINE_SIZE 0
[all …]
/Zephyr-latest/soc/altr/zephyr_nios2f/include/
Dsystem.h64 #define ALT_CPU_BIG_ENDIAN 0
65 #define ALT_CPU_BREAK_ADDR 0x00200820
69 #define ALT_CPU_CPU_ID_VALUE 0x00000000
71 #define ALT_CPU_DATA_ADDR_WIDTH 0x1c
72 #define ALT_CPU_DCACHE_BYPASS_MASK 0x80000000
76 #define ALT_CPU_EXCEPTION_ADDR 0x00400020
77 #define ALT_CPU_FLASH_ACCELERATOR_LINES 0
78 #define ALT_CPU_FLASH_ACCELERATOR_LINE_SIZE 0
83 #define ALT_CPU_HARDWARE_MULX_PRESENT 0
94 #define ALT_CPU_INST_ADDR_WIDTH 0x1c
[all …]
/Zephyr-latest/soc/altr/zephyr_nios2f/cpu/
Dghrd_10m50da.sopcinfo115 <value>0</value>
119 <value>0</value>
188 <value>0</value>
196 <value>0</value>
204 <value>0</value>
212 <value>0</value>
2300 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPP…
259 <value>0</value>
263 <value>0</value>
267 <value>0</value>
[all …]