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/Zephyr-latest/samples/subsys/zbus/dyn_channel/
Dsample.yaml10 - "W: size=01"
11 - "W: Content"
12 - "W: 00 |."
13 - "W: size=02"
14 - "W: Content"
15 - "W: 01 01 |.."
16 - "W: size=03"
17 - "W: Content"
18 - "W: 00 00 00 |..."
19 - "W: size=04"
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DREADME.rst1 .. zephyr:code-sample:: zbus-dyn-channel
3 :relevant-api: zbus_apis
17 .. zephyr-app-commands::
18 :zephyr-app: samples/subsys/zbus/dyn_channel
19 :host-os: unix
26 .. code-block:: console
28 W: size=01
29 W: Content
30 W: 00 |.
31 W: size=02
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/Zephyr-latest/tests/arch/common/stack_unwind/
Dtestcase.yaml10 - qemu_riscv32e
11 - qemu_riscv32
12 - qemu_riscv64
14 - CONFIG_FRAME_POINTER=y
18 - "E: call trace:"
19 - "E: 0: fp: \\w+ ra: \\w+"
20 - "E: 1: fp: \\w+ ra: \\w+"
24 - qemu_riscv32e
25 - qemu_riscv32
26 - qemu_riscv64
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/Zephyr-latest/soc/arm/beetle/
Dsoc_registers.h4 * SPDX-License-Identifier: Apache-2.0
17 /* Offset: 0x000 (r/w) remap control register */
19 /* Offset: 0x004 (r/w) pmu control register */
21 /* Offset: 0x008 (r/w) reset option register */
23 /* Offset: 0x00c (r/w) emi control register */
25 /* Offset: 0x010 (r/w) reset information register */
28 /* Offset: 0x020 (r/w)AHB peripheral access control set */
30 /* Offset: 0x024 (r/w)AHB peripheral access control clear */
33 /* Offset: 0x030 (r/w)APB peripheral access control set */
35 /* Offset: 0x034 (r/w)APB peripheral access control clear */
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/Zephyr-latest/include/zephyr/drivers/gpio/
Dgpio_cmsdk_ahb.h4 * SPDX-License-Identifier: Apache-2.0
17 /* Offset: 0x000 (r/w) data register */
19 /* Offset: 0x004 (r/w) data output latch register */
22 /* Offset: 0x010 (r/w) output enable set register */
24 /* Offset: 0x014 (r/w) output enable clear register */
26 /* Offset: 0x018 (r/w) alternate function set register */
28 /* Offset: 0x01c (r/w) alternate function clear register */
30 /* Offset: 0x020 (r/w) interrupt enable set register */
32 /* Offset: 0x024 (r/w) interrupt enable clear register */
34 /* Offset: 0x028 (r/w) interrupt type set register */
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/Zephyr-latest/drivers/ipm/
Dipm_mhu.h4 * SPDX-License-Identifier: Apache-2.0
27 volatile uint32_t cpu0intr_set; /* ( /W) CPU 0 Interrupt Set Register */
28 volatile uint32_t cpu0intr_clr; /* ( /W) CPU 0 Interrupt Clear Register */
32 volatile uint32_t cpu1intr_set; /* ( /W) CPU 1 Interrupt Set Register */
33 volatile uint32_t cpu1intr_clr; /* ( /W) CPU 1 Interrupt Clear Register */
35 volatile uint32_t pidr4; /* ( /W) Peripheral ID 4 */
37 volatile uint32_t pidr0; /* ( /W) Peripheral ID 0 */
38 volatile uint32_t pidr1; /* ( /W) Peripheral ID 1 */
39 volatile uint32_t pidr2; /* ( /W) Peripheral ID 2 */
40 volatile uint32_t pidr3; /* ( /W) Peripheral ID 3 */
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/Zephyr-latest/include/zephyr/drivers/pcie/
Dpcie.h4 * SPDX-License-Identifier: Apache-2.0
19 #include <zephyr/dt-bindings/pcie/pcie.h>
34 * in include/dt-bindings/pcie/pcie.h: see PCIE_BDF() and friends, since
45 * look to PCIE_ID_* macros in include/dt-bindings/pcie/pcie.h for more.
117 * Initialize PCIe-related information within a specific instance of
158 * These functions are arch-, board-, or SoC-specific.
162 * @brief Read a 32-bit word from an endpoint's configuration space.
173 * @brief Write a 32-bit word to an endpoint's configuration space.
194 /** Scan all available PCI host controllers and sub-busses */
227 * @param bar_index 0-based BAR index
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/Zephyr-latest/kernel/include/
Dwait_q.h6 * SPDX-License-Identifier: Apache-2.0
25 RB_FOR_EACH_CONTAINER(&(wq)->waitq.tree, thread_ptr, base.qnode_rb)
27 static inline void z_waitq_init(_wait_q_t *w) in z_waitq_init() argument
29 w->waitq = (struct _priq_rb) { in z_waitq_init()
36 static inline struct k_thread *z_waitq_head(_wait_q_t *w) in z_waitq_head() argument
38 return (struct k_thread *)rb_get_min(&w->waitq.tree); in z_waitq_head()
44 SYS_DLIST_FOR_EACH_CONTAINER(&((wq)->waitq), thread_ptr, \
47 static inline void z_waitq_init(_wait_q_t *w)
49 sys_dlist_init(&w->waitq);
52 static inline struct k_thread *z_waitq_head(_wait_q_t *w)
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/Zephyr-latest/drivers/counter/
Ddualtimer_cmsdk_apb.h4 * SPDX-License-Identifier: Apache-2.0
16 /* Offset: 0x000 (R/W) Timer 1 Load */
20 /* Offset: 0x008 (R/W) Timer 1 Control */
22 /* Offset: 0x00C ( /W) Timer 1 Interrupt Clear */
28 /* Offset: 0x018 (R/W) Background Load Register */
32 /* Offset: 0x020 (R/W) Timer 2 Load */
36 /* Offset: 0x028 (R/W) Timer 2 Control */
38 /* Offset: 0x02C ( /W) Timer 2 Interrupt Clear */
44 /* Offset: 0x038 (R/W) Background Load Register */
48 /* Offset: 0xF00 (R/W) Integration Test Control Register */
[all …]
Dtimer_cmsdk_apb.h4 * SPDX-License-Identifier: Apache-2.0
16 /* Offset: 0x000 (R/W) control register */
18 /* Offset: 0x004 (R/W) current value register */
20 /* Offset: 0x008 (R/W) reload value register */
25 /* Offset: 0x00C ( /W) interruptclear register */
/Zephyr-latest/tests/benchmarks/latency_measure/
DREADME.rst42 EXTRA_CONF_FILE="prj.userspace.conf" west build -p -b <board> <path to project>
51 +-----------------------------+------------------------------------+
53 +-----------------------------+------------------------------------+
55 +-----------------------------+------------------------------------+
57 +-----------------------------+------------------------------------+
61 …thread.yield.preemptive.ctx.k_to_k - Context switch via k_yield : …
62 …thread.yield.cooperative.ctx.k_to_k - Context switch via k_yield : …
63 …isr.resume.interrupted.thread.kernel - Return from ISR to interrupted thread : …
64 …isr.resume.different.thread.kernel - Return from ISR to another thread : …
65 …thread.create.kernel.from.kernel - Create thread : …
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/Zephyr-latest/scripts/west_commands/zspdx/
Dsbom.py3 # SPDX-License-Identifier: Apache-2.0
36 # create Cmake file-based API directories and query file
51 # check that codemodel-v2 exists as a file, or else create it
52 queryFilePath = os.path.join(cmakeApiDirPath, "codemodel-v2")
61 cm_fd = open(queryFilePath, "w")
83 w = Walker(walkerCfg)
84 retval = w.makeDocuments()
94 scanDocument(scannerCfg, w.docSDK)
95 scanDocument(scannerCfg, w.docApp)
96 scanDocument(scannerCfg, w.docZephyr)
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/Zephyr-latest/drivers/fuel_gauge/bq27z746/
Dbq27z746.h5 * SPDX-License-Identifier: Apache-2.0
14 #define BQ27Z746_MANUFACTURERACCESS 0x00 /* R/W */
15 #define BQ27Z746_ATRATE 0x02 /* R/W, Unit: mA, Range: -32768..32767 */
20 #define BQ27Z746_CURRENT 0x0C /* R/O, Unit: mA, Range: -32768..32767 */
23 #define BQ27Z746_AVERAGECURRENT 0x14 /* R/O, Unit: mA, Range: -32768..32767 */
28 #define BQ27Z746_AVERAGEPOWER 0x22 /* R/O, Unit: mW, Range: -32768..32767 */
37 #define BQ27Z746_TERMINATEVOLTAGE 0x34 /* R/W, Unit: mC, Range: 0..32767 */
42 0x3C /* R/O (sealed), R/W (unsealed or factory access), Unit: mAh, Range: 0..32767 */
43 #define BQ27Z746_ALTMANUFACTURERACCESS 0x3E /* R/W */
47 #define BQ27Z746_VOLTHISETTHRESHOLD 0x62 /* R/W, Unit: mV, Range: 0..5000 */
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/Zephyr-latest/modules/lvgl/
Dlvgl_display_16bit.c5 * SPDX-License-Identifier: Apache-2.0
14 uint16_t w = area->x2 - area->x1 + 1; in lvgl_flush_cb_16bit() local
15 uint16_t h = area->y2 - area->y1 + 1; in lvgl_flush_cb_16bit()
19 flush.x = area->x1; in lvgl_flush_cb_16bit()
20 flush.y = area->y1; in lvgl_flush_cb_16bit()
21 flush.desc.buf_size = w * 2U * h; in lvgl_flush_cb_16bit()
22 flush.desc.width = w; in lvgl_flush_cb_16bit()
23 flush.desc.pitch = w; in lvgl_flush_cb_16bit()
Dlvgl_display_32bit.c5 * SPDX-License-Identifier: Apache-2.0
14 uint16_t w = area->x2 - area->x1 + 1; in lvgl_flush_cb_32bit() local
15 uint16_t h = area->y2 - area->y1 + 1; in lvgl_flush_cb_32bit()
19 flush.x = area->x1; in lvgl_flush_cb_32bit()
20 flush.y = area->y1; in lvgl_flush_cb_32bit()
21 flush.desc.buf_size = w * 4U * h; in lvgl_flush_cb_32bit()
22 flush.desc.width = w; in lvgl_flush_cb_32bit()
23 flush.desc.pitch = w; in lvgl_flush_cb_32bit()
Dlvgl_display_24bit.c5 * SPDX-License-Identifier: Apache-2.0
14 uint16_t w = area->x2 - area->x1 + 1; in lvgl_flush_cb_24bit() local
15 uint16_t h = area->y2 - area->y1 + 1; in lvgl_flush_cb_24bit()
19 flush.x = area->x1; in lvgl_flush_cb_24bit()
20 flush.y = area->y1; in lvgl_flush_cb_24bit()
21 flush.desc.buf_size = w * 3U * h; in lvgl_flush_cb_24bit()
22 flush.desc.width = w; in lvgl_flush_cb_24bit()
23 flush.desc.pitch = w; in lvgl_flush_cb_24bit()
/Zephyr-latest/subsys/logging/backends/
Dlog_backend_adsp_mtrace.c4 * SPDX-License-Identifier: Apache-2.0
55 #define MTRACE_LOG_BUF_SIZE (ADSP_DW_SLOT_SIZE - 2 * sizeof(uint32_t))
64 uint8_t data[ADSP_DW_SLOT_SIZE - sizeof(uint32_t) * 2];
69 if (ADSP_DW->descs[0].type == MTRACE_LOGGING_SLOT_TYPE(MTRACE_CORE)) { in mtrace_init()
73 ADSP_DW->descs[0].type = MTRACE_LOGGING_SLOT_TYPE(MTRACE_CORE); in mtrace_init()
78 struct adsp_debug_slot *slot = (struct adsp_debug_slot *)(ADSP_DW->slots[0]); in mtrace_out()
79 uint8_t *data = slot->data; in mtrace_out()
80 uint32_t r = slot->host_ptr; in mtrace_out()
81 uint32_t w = slot->dsp_ptr; in mtrace_out() local
84 if (w > r) { in mtrace_out()
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/Zephyr-latest/soc/aspeed/ast10x0/tools/
Dgen_uart_booting_image.py5 # SPDX-License-Identifier: Apache-2.0
17 # get src size and round up to 4-byte align
24 with open(dst, 'w+b') as w:
25 w.write(dst_image)
/Zephyr-latest/subsys/bluetooth/crypto/
Dbt_crypto.c2 * SPDX-License-Identifier: Apache-2.0
31 * AES-CMAC and X is used as the key k. in bt_crypto_f4()
56 int bt_crypto_f5(const uint8_t *w, const uint8_t *n1, const uint8_t *n2, const bt_addr_le_t *a1, in bt_crypto_f5() argument
73 LOG_DBG("w %s", bt_hex(w, 32)); in bt_crypto_f5()
77 sys_memcpy_swap(ws, w, 32); in bt_crypto_f5()
88 m[37] = a1->type; in bt_crypto_f5()
89 sys_memcpy_swap(m + 38, a1->a.val, 6); in bt_crypto_f5()
90 m[44] = a2->type; in bt_crypto_f5()
91 sys_memcpy_swap(m + 45, a2->a.val, 6); in bt_crypto_f5()
117 int bt_crypto_f6(const uint8_t *w, const uint8_t *n1, const uint8_t *n2, const uint8_t *r, in bt_crypto_f6() argument
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Dbt_crypto.h2 * SPDX-License-Identifier: Apache-2.0
18 * @param[in] key 128-bit key
24 * @retval -EIO Computation failed.
33 * @param[in] u 256-bit
34 * @param[in] v 256-bit
35 * @param[in] x 128-bit key
36 * @param[in] z 8-bit
40 * @retval -EIO Computation failed.
49 * @param[in] w 256-bit
50 * @param[in] n1 128-bit
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/Zephyr-latest/tests/arch/riscv/fpu_sharing/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
6 * The purpose of this test is to exercize and validate the on-demand and
45 __asm__ volatile ("fcvt.s.w fa0, %0" : : "r" (42) : "fa0"); in ZTEST()
54 /* read the FP reg back which should re-enable the FPU */ in ZTEST()
55 __asm__ volatile ("fcvt.w.s %0, fa0, rtz" : "=r" (val)); in ZTEST()
79 * are expected to be "NaN-boxed" to be valid. So don't use the s in new_thread_check()
84 __asm__ volatile ("fcvt.w.d %0, fa0, rtz" : "=r" (val)); in new_thread_check()
86 __asm__ volatile ("fcvt.w.s %0, fa0, rtz" : "=r" (val)); in new_thread_check()
140 __asm__ volatile ("fcvt.s.w fa1, %0" : : "r" (42) : "fa1"); in thread1_entry()
163 __asm__ volatile ("fcvt.w.s %0, fa1, rtz" : "=r" (val)); in thread1_entry()
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/Zephyr-latest/tests/kernel/pipe/pipe_api/src/
Dtest_pipe_avail.c4 * SPDX-License-Identifier: Apache-2.0
18 .size = sizeof(data) - 1 /* '\0' */,
62 * @brief Test available read / write space for r < w
69 * r w
77 * r_avail = w - r = 3
80 * w_avail = N - (w - r) = 5
100 * @brief Test available read / write space for w < r
107 * w r
116 * r_avail = N - (r - w) = 5
119 * w_avail = r - w = 3
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/Zephyr-latest/drivers/interrupt_controller/
Dintc_nuclei_eclic.c4 * SPDX-License-Identifier: Apache-2.0
29 uint8_t w; member
46 uint8_t w; member
55 uint8_t w; member
64 uint8_t w; member
69 /** 0: non-vectored 1:vectored */
76 uint8_t w; member
103 return (val << (8U - shift)); in leftalign8()
108 return ((1 << len) - 1) & 0xFFFFU; in mask8()
146 union CLICINTATTR intattr = {.w = 0}; in riscv_clic_irq_priority_set()
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Dintc_gicv3_priv.h4 * SPDX-License-Identifier: Apache-2.0
15 #define GIC_BASER_CACHE_NGNRNE 0x0UL /* Device-nGnRnE */
17 #define GIC_BASER_CACHE_NCACHEABLE 0x1UL /* Non-cacheable */
18 #define GIC_BASER_CACHE_RAWT 0x2UL /* Cacheable R-allocate, W-through */
19 #define GIC_BASER_CACHE_RAWB 0x3UL /* Cacheable R-allocate, W-back */
20 #define GIC_BASER_CACHE_WAWT 0x4UL /* Cacheable W-allocate, W-through */
21 #define GIC_BASER_CACHE_WAWB 0x5UL /* Cacheable W-allocate, W-back */
22 #define GIC_BASER_CACHE_RAWAWT 0x6UL /* Cacheable R-allocate, W-allocate, W-through */
23 #define GIC_BASER_CACHE_RAWAWB 0x7UL /* Cacheable R-allocate, W-allocate, W-back */
24 #define GIC_BASER_SHARE_NO 0x0UL /* Non-shareable */
/Zephyr-latest/boards/raspberrypi/rpi_pico/
Drpi_pico_rp2040_w.yaml1 identifier: rpi_pico/rp2040/w
2 name: RaspberryPi-Pico-w
8 - zephyr
9 - gnuarmemb
10 - xtools
12 - uart
13 - gpio
14 - adc
15 - i2c
16 - spi
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