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/Zephyr-latest/dts/bindings/spi/
Dsnps,designware-spi.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "snps,designware-spi"
9 include: [spi-controller.yaml, pinctrl-device.yaml]
18 aux-reg:
24 fifo-depth:
27 RX/TX FIFO depth. Corresponds to the SSI_TX_FIFO_DEPTH
29 Serial Interface. Depth ranges from 2-256.
31 serial-target:
38 max-xfer-size:
45 - 16
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Dintel,penwell-spi.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "intel,penwell-spi"
9 include: [spi-controller.yaml, pcie-device.yaml]
15 cs-gpios:
18 pw,cs-mode:
27 pw,cs-output:
37 pw,fifo-depth:
/Zephyr-latest/dts/bindings/serial/
Daltr,jtag-uart.yaml3 compatible: "altr,jtag-uart"
5 include: uart-controller.yaml
11 write-fifo-depth:
16 Must be same as Write FIFO: Buffer depth (bytes) in platform designer.
/Zephyr-latest/dts/bindings/dai/
Dnxp,dai-esai.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,dai-esai"
13 dai-index:
21 tx-fifo-watermark:
29 rx-fifo-watermark:
37 fifo-depth:
40 Use this property to set the FIFO depth that will be reported
44 we mean the actual (hardware) value of the FIFO depth. This is needed
47 Generally, reporting a false FIFO depth should be avoided. Please note
48 that the sanity check for tx/rx-fifo-watermark uses DEFAULT_FIFO_DETPH
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Dnxp,dai-sai.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,dai-sai"
8 include: [base.yaml, pinctrl-device.yaml]
13 mclk-is-output:
21 rx-fifo-watermark:
28 tx-fifo-watermark:
37 fifo-depth:
40 Use this property to set the FIFO depth that will be reported
45 the FIFO depth. This is needed because some applications (e.g: SOF)
48 FIFO depth should be avoided. Please note that the sanity check
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/Zephyr-latest/subsys/sip_svc/
DKconfig3 # Copyright (c) 2022-2023, Intel Corporation.
4 # SPDX-License-Identifier: Apache-2.0
11 implementing the platform-specifics via SIP SVC driver.
16 module-str = arm_sip_svc_subsys
40 int "ARM SiP service request message queue depth"
43 Depth of msgq used inside sip_svc controller.
58 int "Delay used for polling asynchronous jobs in micro-seconds"
/Zephyr-latest/dts/arc/synopsys/
Demsdp.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 //#include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
26 intc: arcv2-intc {
27 compatible = "snps,arcv2-intc";
28 interrupt-controller;
29 #interrupt-cells = <2>;
33 compatible = "snps,arc-timer";
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Darc_hs4xd.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
43 intc: arcv2-intc {
44 compatible = "snps,arcv2-intc";
45 interrupt-controller;
46 #interrupt-cells = <2>;
50 idu_intc: idu-interrupt-controller {
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Darc_hsdk.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
43 intc: arcv2-intc {
44 compatible = "snps,arcv2-intc";
45 interrupt-controller;
46 #interrupt-cells = <2>;
50 idu_intc: idu-interrupt-controller {
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/Zephyr-latest/arch/xtensa/include/
Dxtensa_backtrace.h4 * SPDX-License-Identifier: Apache-2.0
47 * (B -> A -> X -> esp_backtrace_get_start),
49 * - Flush CPU registers and window frames onto the current stack
50 * - Return PC and SP of function A (i.e. start of the stack's backtrace)
51 * - Return PC of function B (i.e. next_pc)
69 * stack frame(i-1) on the same call stack (i.e. the caller of frame(i)).
74 * - Frame structure updated with SP and PC of frame(i-1).
75 * next_pc now points to frame(i-2).
76 * - If a next_pc of 0 is returned, it indicates that frame(i-1)
82 * - True if the SP and PC of the next frame(i-1) are sane
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/Zephyr-latest/arch/x86/core/
DKconfig.intel641 # Intel64-specific X86 subarchitecture options
4 # SPDX-License-Identifier: Apache-2.0
29 support limited call-tree depth and must fit into the low core,
61 int "Maximum IRQ nesting depth"
91 supporting user-level threads that are protected from each other and
/Zephyr-latest/samples/drivers/display/boards/
Dmimxrt1170_evk_mimxrt1176_cm7_A.conf4 # SPDX-License-Identifier: Apache-2.0
7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
8 # 1280x720 display in a 32-bpp format (e.g. ARGB8888), this is (720 / 8) * (720 / 4) * 4 = 64800
Dmimxrt1170_evkb_cm7.conf4 # SPDX-License-Identifier: Apache-2.0
7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
8 # 1280x720 display in a 32-bpp format (e.g. ARGB8888), this is (720 / 8) * (720 / 4) * 4 = 64800
Dmimxrt595_evk_mimxrt595s_cm33.conf4 # SPDX-License-Identifier: Apache-2.0
7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
8 # 1280x720 display in a 32-bpp format (e.g. ARGB8888), this is (720 / 8) * (720 / 4) * 4 = 64800
/Zephyr-latest/samples/modules/lvgl/demos/boards/
Dmimxrt595_evk_mimxrt595s_cm33.conf4 # SPDX-License-Identifier: Apache-2.0
7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
8 # 1280x720 display in a 16-bpp format (e.g. RGB565), this is (1280 / 8) * (720 / 4) * 2 = 57600
/Zephyr-latest/.github/workflows/
Dcompliance.yml6 - edited
7 - opened
8 - reopened
9 - synchronize
13 runs-on: ubuntu-22.04
16 - name: Update PATH for west
20 - name: Checkout the code
24 fetch-depth: 0
26 - name: Rebase onto the target branch
30 git config --global user.email "you@example.com"
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Dlicense_check.yml7 runs-on: ubuntu-22.04
10 - name: Checkout the code
13 fetch-depth: 0
14 - name: Scan the code
16 uses: zephyrproject-rtos/action_scancode@v4
18 directory-to-scan: 'scan/'
19 - name: Artifact Upload
20 uses: actions/upload-artifact@v4
25 - name: Verify
27 if [ -s ./artifacts/report.txt ]; then
Ddaily_test_version.yml2 # SPDX-License-Identifier: Apache-2.0
8 - cron: '50 22 * * *'
11 - refs/tags/*
15 runs-on: ubuntu-22.04
16 if: github.repository == 'zephyrproject-rtos/zephyr'
19 - name: Configure AWS Credentials
20 uses: aws-actions/configure-aws-credentials@v4
22 aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
23 aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}
24 aws-region: us-east-1
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Dmanifest.yml7 runs-on: ubuntu-22.04
10 - name: Checkout the code
15 fetch-depth: 0
16 persist-credentials: false
18 - name: west setup
21 working-directory: zephyrproject/zephyr
24 git config --global user.email "you@example.com"
25 git config --global user.name "Your Name"
26 west init -l . || true
28 - name: Manifest
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/Zephyr-latest/arch/xtensa/core/
Dxtensa_backtrace.c4 * SPDX-License-Identifier: Apache-2.0
38 return pc - 3; in xtensa_cpu_process_stack_pc()
82 if (xtensa_is_outside_stack_bounds((uintptr_t)frame->sp, 0, UINT32_MAX)) { in xtensa_backtrace_get_next_frame()
86 /* Use frame(i-1)'s BS area located below frame(i)'s in xtensa_backtrace_get_next_frame()
87 * sp to get frame(i-1)'s sp and frame(i-2)'s pc in xtensa_backtrace_get_next_frame()
91 char *base_save = (char *)frame->sp; in xtensa_backtrace_get_next_frame()
93 frame->pc = frame->next_pc; in xtensa_backtrace_get_next_frame()
94 /* If next_pc = 0, indicates frame(i-1) is the last in xtensa_backtrace_get_next_frame()
97 frame->next_pc = *((uint32_t *)(base_save - 16)); in xtensa_backtrace_get_next_frame()
98 frame->sp = *((uint32_t *)(base_save - 12)); in xtensa_backtrace_get_next_frame()
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/Zephyr-latest/drivers/dai/intel/ssp/
Dssp.h4 * SPDX-License-Identifier: Apache-2.0
30 #include "dai-params-intel-ipc3.h"
31 #include "dai-params-intel-ipc4.h"
34 (((1ULL << ((b_hi) - (b_lo) + 1ULL)) - 1ULL) << (b_lo))
37 (((x) & ((1ULL << ((b_hi) - (b_lo) + 1ULL)) - 1ULL)) << (b_lo))
46 #define DAI_INTEL_SSP_MAX_FREQ_INDEX (DAI_INTEL_SSP_NUM_FREQ - 1)
49 /* the SSP port fifo depth */
52 /* the watermark for the SSP fifo depth setting */
80 /** \brief BCLKs can be driven by multiple sources - M/N or XTAL directly.
124 uint32_t depth; member
/Zephyr-latest/doc/connectivity/networking/api/
Dlldp.rst8 :depth: 2
13 The Link Layer Discovery Protocol (LLDP) is a vendor-neutral link layer
Dtrickle.rst8 :depth: 2
17 low-power and lossy networks) to exchange information in a highly
Ddhcpv4.rst8 :depth: 2
26 See :zephyr:code-sample:`dhcpv4-client` sample application for details.
/Zephyr-latest/dts/bindings/clock/
Dnuvoton,npcx-pcc.yaml2 # SPDX-License-Identifier: Apache-2.0
8 High-Frequency Clock Generator (HFCG), is the source clock of Cortex-M4 core
14 clock-frequency = <DT_FREQ_M(100)>; /* OFMCLK runs at 100MHz */
15 core-prescaler = <5>; /* CORE_CLK runs at 20MHz */
16 apb1-prescaler = <5>; /* APB1_CLK runs at 20MHz */
17 apb2-prescaler = <5>; /* APB2_CLK runs at 20MHz */
18 apb3-prescaler = <5>; /* APB3_CLK runs at 20MHz */
21 compatible: "nuvoton,npcx-pcc"
23 include: [clock-controller.yaml, base.yaml]
29 clock-frequency:
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