1description: Altera JTAG UART
2
3compatible: "altr,jtag-uart"
4
5include: uart-controller.yaml
6
7properties:
8  reg:
9    required: true
10
11  write-fifo-depth:
12    type: int
13    default: 64
14    description: |
15      Buffer size of transmit fifo. This used to implement irq_tx_complete.
16      Must be same as Write FIFO: Buffer depth (bytes) in platform designer.
17