| /hal_atmel-3.5.0-3.4.0/asf/sam/include/sam3x/component/ |
| D | matrix.h | 76 #define MATRIX_MCFG_ULBT(value) ((MATRIX_MCFG_ULBT_Msk & ((value) << MATRIX_MCFG_ULBT_Pos))) argument
80 #define MATRIX_SCFG_SLOT_CYCLE(value) ((MATRIX_SCFG_SLOT_CYCLE_Msk & ((value) << MATRIX_SCFG_SLOT_C… argument
83 #define MATRIX_SCFG_DEFMSTR_TYPE(value) ((MATRIX_SCFG_DEFMSTR_TYPE_Msk & ((value) << MATRIX_SCFG_DE… argument
86 #define MATRIX_SCFG_FIXED_DEFMSTR(value) ((MATRIX_SCFG_FIXED_DEFMSTR_Msk & ((value) << MATRIX_SCFG_… argument
89 #define MATRIX_SCFG_ARBT(value) ((MATRIX_SCFG_ARBT_Msk & ((value) << MATRIX_SCFG_ARBT_Pos))) argument
93 #define MATRIX_PRAS0_M0PR(value) ((MATRIX_PRAS0_M0PR_Msk & ((value) << MATRIX_PRAS0_M0PR_Pos))) argument
96 #define MATRIX_PRAS0_M1PR(value) ((MATRIX_PRAS0_M1PR_Msk & ((value) << MATRIX_PRAS0_M1PR_Pos))) argument
99 #define MATRIX_PRAS0_M2PR(value) ((MATRIX_PRAS0_M2PR_Msk & ((value) << MATRIX_PRAS0_M2PR_Pos))) argument
102 #define MATRIX_PRAS0_M3PR(value) ((MATRIX_PRAS0_M3PR_Msk & ((value) << MATRIX_PRAS0_M3PR_Pos))) argument
105 #define MATRIX_PRAS0_M4PR(value) ((MATRIX_PRAS0_M4PR_Msk & ((value) << MATRIX_PRAS0_M4PR_Pos))) argument
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| D | emac.h | 144 #define EMAC_RBQP_ADDR(value) ((EMAC_RBQP_ADDR_Msk & ((value) << EMAC_RBQP_ADDR_Pos))) argument
148 #define EMAC_TBQP_ADDR(value) ((EMAC_TBQP_ADDR_Msk & ((value) << EMAC_TBQP_ADDR_Pos))) argument
208 #define EMAC_MAN_DATA(value) ((EMAC_MAN_DATA_Msk & ((value) << EMAC_MAN_DATA_Pos))) argument
211 #define EMAC_MAN_CODE(value) ((EMAC_MAN_CODE_Msk & ((value) << EMAC_MAN_CODE_Pos))) argument
214 #define EMAC_MAN_REGA(value) ((EMAC_MAN_REGA_Msk & ((value) << EMAC_MAN_REGA_Pos))) argument
217 #define EMAC_MAN_PHYA(value) ((EMAC_MAN_PHYA_Msk & ((value) << EMAC_MAN_PHYA_Pos))) argument
220 #define EMAC_MAN_RW(value) ((EMAC_MAN_RW_Msk & ((value) << EMAC_MAN_RW_Pos))) argument
223 #define EMAC_MAN_SOF(value) ((EMAC_MAN_SOF_Msk & ((value) << EMAC_MAN_SOF_Pos))) argument
227 #define EMAC_PTR_PTIME(value) ((EMAC_PTR_PTIME_Msk & ((value) << EMAC_PTR_PTIME_Pos))) argument
231 #define EMAC_PFR_FROK(value) ((EMAC_PFR_FROK_Msk & ((value) << EMAC_PFR_FROK_Pos))) argument
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| D | adc.h | 104 #define ADC_MR_PRESCAL(value) ((ADC_MR_PRESCAL_Msk & ((value) << ADC_MR_PRESCAL_Pos))) argument
134 #define ADC_MR_TRACKTIM(value) ((ADC_MR_TRACKTIM_Msk & ((value) << ADC_MR_TRACKTIM_Pos))) argument
137 #define ADC_MR_TRANSFER(value) ((ADC_MR_TRANSFER_Msk & ((value) << ADC_MR_TRANSFER_Pos))) argument
144 #define ADC_SEQR1_USCH1(value) ((ADC_SEQR1_USCH1_Msk & ((value) << ADC_SEQR1_USCH1_Pos))) argument
147 #define ADC_SEQR1_USCH2(value) ((ADC_SEQR1_USCH2_Msk & ((value) << ADC_SEQR1_USCH2_Pos))) argument
150 #define ADC_SEQR1_USCH3(value) ((ADC_SEQR1_USCH3_Msk & ((value) << ADC_SEQR1_USCH3_Pos))) argument
153 #define ADC_SEQR1_USCH4(value) ((ADC_SEQR1_USCH4_Msk & ((value) << ADC_SEQR1_USCH4_Pos))) argument
156 #define ADC_SEQR1_USCH5(value) ((ADC_SEQR1_USCH5_Msk & ((value) << ADC_SEQR1_USCH5_Pos))) argument
159 #define ADC_SEQR1_USCH6(value) ((ADC_SEQR1_USCH6_Msk & ((value) << ADC_SEQR1_USCH6_Pos))) argument
162 #define ADC_SEQR1_USCH7(value) ((ADC_SEQR1_USCH7_Msk & ((value) << ADC_SEQR1_USCH7_Pos))) argument
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| D | ssc.h | 74 #define SSC_CMR_DIV(value) ((SSC_CMR_DIV_Msk & ((value) << SSC_CMR_DIV_Pos))) argument
78 #define SSC_RCMR_CKS(value) ((SSC_RCMR_CKS_Msk & ((value) << SSC_RCMR_CKS_Pos))) argument
84 #define SSC_RCMR_CKO(value) ((SSC_RCMR_CKO_Msk & ((value) << SSC_RCMR_CKO_Pos))) argument
91 #define SSC_RCMR_CKG(value) ((SSC_RCMR_CKG_Msk & ((value) << SSC_RCMR_CKG_Pos))) argument
97 #define SSC_RCMR_START(value) ((SSC_RCMR_START_Msk & ((value) << SSC_RCMR_START_Pos))) argument
110 #define SSC_RCMR_STTDLY(value) ((SSC_RCMR_STTDLY_Msk & ((value) << SSC_RCMR_STTDLY_Pos))) argument
113 #define SSC_RCMR_PERIOD(value) ((SSC_RCMR_PERIOD_Msk & ((value) << SSC_RCMR_PERIOD_Pos))) argument
117 #define SSC_RFMR_DATLEN(value) ((SSC_RFMR_DATLEN_Msk & ((value) << SSC_RFMR_DATLEN_Pos))) argument
122 #define SSC_RFMR_DATNB(value) ((SSC_RFMR_DATNB_Msk & ((value) << SSC_RFMR_DATNB_Pos))) argument
125 #define SSC_RFMR_FSLEN(value) ((SSC_RFMR_FSLEN_Msk & ((value) << SSC_RFMR_FSLEN_Pos))) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4s/component/ |
| D | matrix.h | 68 #define MATRIX_MCFG_ULBT(value) ((MATRIX_MCFG_ULBT_Msk & ((value) << MATRIX_MCFG_ULBT_Pos))) argument
77 #define MATRIX_SCFG_SLOT_CYCLE(value) ((MATRIX_SCFG_SLOT_CYCLE_Msk & ((value) << MATRIX_SCFG_SLOT_C… argument
80 #define MATRIX_SCFG_DEFMSTR_TYPE(value) ((MATRIX_SCFG_DEFMSTR_TYPE_Msk & ((value) << MATRIX_SCFG_DE… argument
86 #define MATRIX_SCFG_FIXED_DEFMSTR(value) ((MATRIX_SCFG_FIXED_DEFMSTR_Msk & ((value) << MATRIX_SCFG_… argument
89 #define MATRIX_SCFG_ARBT(value) ((MATRIX_SCFG_ARBT_Msk & ((value) << MATRIX_SCFG_ARBT_Pos))) argument
95 #define MATRIX_PRAS0_M0PR(value) ((MATRIX_PRAS0_M0PR_Msk & ((value) << MATRIX_PRAS0_M0PR_Pos))) argument
98 #define MATRIX_PRAS0_M1PR(value) ((MATRIX_PRAS0_M1PR_Msk & ((value) << MATRIX_PRAS0_M1PR_Pos))) argument
101 #define MATRIX_PRAS0_M2PR(value) ((MATRIX_PRAS0_M2PR_Msk & ((value) << MATRIX_PRAS0_M2PR_Pos))) argument
104 #define MATRIX_PRAS0_M3PR(value) ((MATRIX_PRAS0_M3PR_Msk & ((value) << MATRIX_PRAS0_M3PR_Pos))) argument
107 #define MATRIX_PRAS0_M4PR(value) ((MATRIX_PRAS0_M4PR_Msk & ((value) << MATRIX_PRAS0_M4PR_Pos))) argument
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| D | ssc.h | 85 #define SSC_CMR_DIV(value) ((SSC_CMR_DIV_Msk & ((value) << SSC_CMR_DIV_Pos))) argument
89 #define SSC_RCMR_CKS(value) ((SSC_RCMR_CKS_Msk & ((value) << SSC_RCMR_CKS_Pos))) argument
95 #define SSC_RCMR_CKO(value) ((SSC_RCMR_CKO_Msk & ((value) << SSC_RCMR_CKO_Pos))) argument
102 #define SSC_RCMR_CKG(value) ((SSC_RCMR_CKG_Msk & ((value) << SSC_RCMR_CKG_Pos))) argument
108 #define SSC_RCMR_START(value) ((SSC_RCMR_START_Msk & ((value) << SSC_RCMR_START_Pos))) argument
121 #define SSC_RCMR_STTDLY(value) ((SSC_RCMR_STTDLY_Msk & ((value) << SSC_RCMR_STTDLY_Pos))) argument
124 #define SSC_RCMR_PERIOD(value) ((SSC_RCMR_PERIOD_Msk & ((value) << SSC_RCMR_PERIOD_Pos))) argument
128 #define SSC_RFMR_DATLEN(value) ((SSC_RFMR_DATLEN_Msk & ((value) << SSC_RFMR_DATLEN_Pos))) argument
133 #define SSC_RFMR_DATNB(value) ((SSC_RFMR_DATNB_Msk & ((value) << SSC_RFMR_DATNB_Pos))) argument
136 #define SSC_RFMR_FSLEN(value) ((SSC_RFMR_FSLEN_Msk & ((value) << SSC_RFMR_FSLEN_Pos))) argument
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| D | adc.h | 88 #define ADC_MR_TRGSEL(value) ((ADC_MR_TRGSEL_Msk & ((value) << ADC_MR_TRGSEL_Pos))) argument
106 #define ADC_MR_PRESCAL(value) ((ADC_MR_PRESCAL_Msk & ((value) << ADC_MR_PRESCAL_Pos))) argument
109 #define ADC_MR_STARTUP(value) ((ADC_MR_STARTUP_Msk & ((value) << ADC_MR_STARTUP_Pos))) argument
128 #define ADC_MR_SETTLING(value) ((ADC_MR_SETTLING_Msk & ((value) << ADC_MR_SETTLING_Pos))) argument
138 #define ADC_MR_TRACKTIM(value) ((ADC_MR_TRACKTIM_Msk & ((value) << ADC_MR_TRACKTIM_Pos))) argument
141 #define ADC_MR_TRANSFER(value) ((ADC_MR_TRANSFER_Msk & ((value) << ADC_MR_TRANSFER_Pos))) argument
148 #define ADC_SEQR1_USCH1(value) ((ADC_SEQR1_USCH1_Msk & ((value) << ADC_SEQR1_USCH1_Pos))) argument
151 #define ADC_SEQR1_USCH2(value) ((ADC_SEQR1_USCH2_Msk & ((value) << ADC_SEQR1_USCH2_Pos))) argument
154 #define ADC_SEQR1_USCH3(value) ((ADC_SEQR1_USCH3_Msk & ((value) << ADC_SEQR1_USCH3_Pos))) argument
157 #define ADC_SEQR1_USCH4(value) ((ADC_SEQR1_USCH4_Msk & ((value) << ADC_SEQR1_USCH4_Pos))) argument
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| D | smc.h | 63 #define SMC_SETUP_NWE_SETUP(value) ((SMC_SETUP_NWE_SETUP_Msk & ((value) << SMC_SETUP_NWE_SETUP_Pos)… argument
66 #define SMC_SETUP_NCS_WR_SETUP(value) ((SMC_SETUP_NCS_WR_SETUP_Msk & ((value) << SMC_SETUP_NCS_WR_S… argument
69 #define SMC_SETUP_NRD_SETUP(value) ((SMC_SETUP_NRD_SETUP_Msk & ((value) << SMC_SETUP_NRD_SETUP_Pos)… argument
72 #define SMC_SETUP_NCS_RD_SETUP(value) ((SMC_SETUP_NCS_RD_SETUP_Msk & ((value) << SMC_SETUP_NCS_RD_S… argument
76 #define SMC_PULSE_NWE_PULSE(value) ((SMC_PULSE_NWE_PULSE_Msk & ((value) << SMC_PULSE_NWE_PULSE_Pos)… argument
79 #define SMC_PULSE_NCS_WR_PULSE(value) ((SMC_PULSE_NCS_WR_PULSE_Msk & ((value) << SMC_PULSE_NCS_WR_P… argument
82 #define SMC_PULSE_NRD_PULSE(value) ((SMC_PULSE_NRD_PULSE_Msk & ((value) << SMC_PULSE_NRD_PULSE_Pos)… argument
85 #define SMC_PULSE_NCS_RD_PULSE(value) ((SMC_PULSE_NCS_RD_PULSE_Msk & ((value) << SMC_PULSE_NCS_RD_P… argument
89 #define SMC_CYCLE_NWE_CYCLE(value) ((SMC_CYCLE_NWE_CYCLE_Msk & ((value) << SMC_CYCLE_NWE_CYCLE_Pos)… argument
92 #define SMC_CYCLE_NRD_CYCLE(value) ((SMC_CYCLE_NRD_CYCLE_Msk & ((value) << SMC_CYCLE_NRD_CYCLE_Pos)… argument
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| D | pwm.h | 114 #define PWM_CLK_DIVA(value) ((PWM_CLK_DIVA_Msk & ((value) << PWM_CLK_DIVA_Pos))) argument
119 #define PWM_CLK_PREA(value) ((PWM_CLK_PREA_Msk & ((value) << PWM_CLK_PREA_Pos))) argument
133 #define PWM_CLK_DIVB(value) ((PWM_CLK_DIVB_Msk & ((value) << PWM_CLK_DIVB_Pos))) argument
138 #define PWM_CLK_PREB(value) ((PWM_CLK_PREB_Msk & ((value) << PWM_CLK_PREB_Pos))) argument
208 #define PWM_SCM_UPDM(value) ((PWM_SCM_UPDM_Msk & ((value) << PWM_SCM_UPDM_Pos))) argument
215 #define PWM_SCM_PTRCS(value) ((PWM_SCM_PTRCS_Msk & ((value) << PWM_SCM_PTRCS_Pos))) argument
221 #define PWM_SCUP_UPR(value) ((PWM_SCUP_UPR_Msk & ((value) << PWM_SCUP_UPR_Pos))) argument
224 #define PWM_SCUP_UPRCNT(value) ((PWM_SCUP_UPRCNT_Msk & ((value) << PWM_SCUP_UPRCNT_Pos))) argument
228 #define PWM_SCUPUPD_UPRUPD(value) ((PWM_SCUPUPD_UPRUPD_Msk & ((value) << PWM_SCUPUPD_UPRUPD_Pos))) argument
370 #define PWM_FMR_FPOL(value) ((PWM_FMR_FPOL_Msk & ((value) << PWM_FMR_FPOL_Pos))) argument
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| D | tc.h | 78 #define TC_CMR_TCCLKS(value) ((TC_CMR_TCCLKS_Msk & ((value) << TC_CMR_TCCLKS_Pos))) argument
90 #define TC_CMR_BURST(value) ((TC_CMR_BURST_Msk & ((value) << TC_CMR_BURST_Pos))) argument
99 #define TC_CMR_ETRGEDG(value) ((TC_CMR_ETRGEDG_Msk & ((value) << TC_CMR_ETRGEDG_Pos))) argument
109 #define TC_CMR_LDRA(value) ((TC_CMR_LDRA_Msk & ((value) << TC_CMR_LDRA_Pos))) argument
116 #define TC_CMR_LDRB(value) ((TC_CMR_LDRB_Msk & ((value) << TC_CMR_LDRB_Pos))) argument
125 #define TC_CMR_EEVTEDG(value) ((TC_CMR_EEVTEDG_Msk & ((value) << TC_CMR_EEVTEDG_Pos))) argument
132 #define TC_CMR_EEVT(value) ((TC_CMR_EEVT_Msk & ((value) << TC_CMR_EEVT_Pos))) argument
140 #define TC_CMR_WAVSEL(value) ((TC_CMR_WAVSEL_Msk & ((value) << TC_CMR_WAVSEL_Pos))) argument
147 #define TC_CMR_ACPA(value) ((TC_CMR_ACPA_Msk & ((value) << TC_CMR_ACPA_Pos))) argument
154 #define TC_CMR_ACPC(value) ((TC_CMR_ACPC_Msk & ((value) << TC_CMR_ACPC_Pos))) argument
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| D | rtc.h | 61 #define RTC_CR_TIMEVSEL(value) ((RTC_CR_TIMEVSEL_Msk & ((value) << RTC_CR_TIMEVSEL_Pos))) argument
68 #define RTC_CR_CALEVSEL(value) ((RTC_CR_CALEVSEL_Msk & ((value) << RTC_CR_CALEVSEL_Pos))) argument
78 #define RTC_MR_CORRECTION(value) ((RTC_MR_CORRECTION_Msk & ((value) << RTC_MR_CORRECTION_Pos))) argument
82 #define RTC_MR_OUT0(value) ((RTC_MR_OUT0_Msk & ((value) << RTC_MR_OUT0_Pos))) argument
93 #define RTC_MR_OUT1(value) ((RTC_MR_OUT1_Msk & ((value) << RTC_MR_OUT1_Pos))) argument
104 #define RTC_MR_THIGH(value) ((RTC_MR_THIGH_Msk & ((value) << RTC_MR_THIGH_Pos))) argument
115 #define RTC_MR_TPERIOD(value) ((RTC_MR_TPERIOD_Msk & ((value) << RTC_MR_TPERIOD_Pos))) argument
123 #define RTC_TIMR_SEC(value) ((RTC_TIMR_SEC_Msk & ((value) << RTC_TIMR_SEC_Pos))) argument
126 #define RTC_TIMR_MIN(value) ((RTC_TIMR_MIN_Msk & ((value) << RTC_TIMR_MIN_Pos))) argument
129 #define RTC_TIMR_HOUR(value) ((RTC_TIMR_HOUR_Msk & ((value) << RTC_TIMR_HOUR_Pos))) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam0/include/same54/component/ |
| D | picop.h | 71 #define PICOP_ID_ID(value) (PICOP_ID_ID_Msk & ((value) << PICOP_ID_ID_Pos)) argument
94 #define PICOP_CONFIG_ISA(value) (PICOP_CONFIG_ISA_Msk & ((value) << PICOP_CONFIG_ISA_Pos)) argument
109 #define PICOP_CONFIG_RRET(value) (PICOP_CONFIG_RRET_Msk & ((value) << PICOP_CONFIG_RRET_Pos)) argument
138 #define PICOP_CTRL_WPVEC(value) (PICOP_CTRL_WPVEC_Msk & ((value) << PICOP_CTRL_WPVEC_Pos)) argument
145 #define PICOP_CTRL_WPCTX(value) (PICOP_CTRL_WPCTX_Msk & ((value) << PICOP_CTRL_WPCTX_Pos)) argument
156 #define PICOP_CTRL_WPCODE(value) (PICOP_CTRL_WPCODE_Msk & ((value) << PICOP_CTRL_WPCODE_Pos)) argument
226 #define PICOP_CMD_CMD_CMD(value) (PICOP_CMD_CMD_CMD_Msk & ((value) << PICOP_CMD_CMD_CMD_Pos)) argument
251 #define PICOP_CMD_CMD_UNLOCK(value) (PICOP_CMD_CMD_UNLOCK_Msk & ((value) << PICOP_CMD_CMD_UNLOCK_Po… argument
277 #define PICOP_CMD_STATUS_UPC(value) (PICOP_CMD_STATUS_UPC_Msk & ((value) << PICOP_CMD_STATUS_UPC_Po… argument
364 #define PICOP_CMD_STATUS_STATE(value) (PICOP_CMD_STATUS_STATE_Msk & ((value) << PICOP_CMD_STATUS_ST… argument
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| D | icm.h | 76 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
85 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
94 #define ICM_CFG_HAPROT(value) (ICM_CFG_HAPROT_Msk & ((value) << ICM_CFG_HAPROT_Pos)) argument
97 #define ICM_CFG_DAPROT(value) (ICM_CFG_DAPROT_Msk & ((value) << ICM_CFG_DAPROT_Pos)) argument
127 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
130 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
133 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
157 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
160 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
184 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4e/component/ |
| D | matrix.h | 87 #define MATRIX_MCFG_ULBT(value) ((MATRIX_MCFG_ULBT_Msk & ((value) << MATRIX_MCFG_ULBT_Pos))) argument
91 #define MATRIX_SCFG_SLOT_CYCLE(value) ((MATRIX_SCFG_SLOT_CYCLE_Msk & ((value) << MATRIX_SCFG_SLOT_C… argument
94 #define MATRIX_SCFG_DEFMSTR_TYPE(value) ((MATRIX_SCFG_DEFMSTR_TYPE_Msk & ((value) << MATRIX_SCFG_DE… argument
97 #define MATRIX_SCFG_FIXED_DEFMSTR(value) ((MATRIX_SCFG_FIXED_DEFMSTR_Msk & ((value) << MATRIX_SCFG_… argument
101 #define MATRIX_PRAS_M0PR(value) ((MATRIX_PRAS_M0PR_Msk & ((value) << MATRIX_PRAS_M0PR_Pos))) argument
104 #define MATRIX_PRAS_M1PR(value) ((MATRIX_PRAS_M1PR_Msk & ((value) << MATRIX_PRAS_M1PR_Pos))) argument
107 #define MATRIX_PRAS_M2PR(value) ((MATRIX_PRAS_M2PR_Msk & ((value) << MATRIX_PRAS_M2PR_Pos))) argument
110 #define MATRIX_PRAS_M3PR(value) ((MATRIX_PRAS_M3PR_Msk & ((value) << MATRIX_PRAS_M3PR_Pos))) argument
113 #define MATRIX_PRAS_M4PR(value) ((MATRIX_PRAS_M4PR_Msk & ((value) << MATRIX_PRAS_M4PR_Pos))) argument
116 #define MATRIX_PRAS_M5PR(value) ((MATRIX_PRAS_M5PR_Msk & ((value) << MATRIX_PRAS_M5PR_Pos))) argument
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| D | afec.h | 110 #define AFEC_MR_PRESCAL(value) ((AFEC_MR_PRESCAL_Msk & ((value) << AFEC_MR_PRESCAL_Pos))) argument
140 #define AFEC_MR_TRACKTIM(value) ((AFEC_MR_TRACKTIM_Msk & ((value) << AFEC_MR_TRACKTIM_Pos))) argument
143 #define AFEC_MR_TRANSFER(value) ((AFEC_MR_TRANSFER_Msk & ((value) << AFEC_MR_TRANSFER_Pos))) argument
156 #define AFEC_EMR_CMPSEL(value) ((AFEC_EMR_CMPSEL_Msk & ((value) << AFEC_EMR_CMPSEL_Pos))) argument
160 #define AFEC_EMR_CMPFILTER(value) ((AFEC_EMR_CMPFILTER_Msk & ((value) << AFEC_EMR_CMPFILTER_Pos))) argument
174 #define AFEC_SEQ1R_USCH0(value) ((AFEC_SEQ1R_USCH0_Msk & ((value) << AFEC_SEQ1R_USCH0_Pos))) argument
177 #define AFEC_SEQ1R_USCH1(value) ((AFEC_SEQ1R_USCH1_Msk & ((value) << AFEC_SEQ1R_USCH1_Pos))) argument
180 #define AFEC_SEQ1R_USCH2(value) ((AFEC_SEQ1R_USCH2_Msk & ((value) << AFEC_SEQ1R_USCH2_Pos))) argument
183 #define AFEC_SEQ1R_USCH3(value) ((AFEC_SEQ1R_USCH3_Msk & ((value) << AFEC_SEQ1R_USCH3_Pos))) argument
186 #define AFEC_SEQ1R_USCH4(value) ((AFEC_SEQ1R_USCH4_Msk & ((value) << AFEC_SEQ1R_USCH4_Pos))) argument
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| D | pwm.h | 129 #define PWM_CLK_DIVA(value) ((PWM_CLK_DIVA_Msk & ((value) << PWM_CLK_DIVA_Pos))) argument
134 #define PWM_CLK_PREA(value) ((PWM_CLK_PREA_Msk & ((value) << PWM_CLK_PREA_Pos))) argument
148 #define PWM_CLK_DIVB(value) ((PWM_CLK_DIVB_Msk & ((value) << PWM_CLK_DIVB_Pos))) argument
153 #define PWM_CLK_PREB(value) ((PWM_CLK_PREB_Msk & ((value) << PWM_CLK_PREB_Pos))) argument
223 #define PWM_SCM_UPDM(value) ((PWM_SCM_UPDM_Msk & ((value) << PWM_SCM_UPDM_Pos))) argument
230 #define PWM_SCM_PTRCS(value) ((PWM_SCM_PTRCS_Msk & ((value) << PWM_SCM_PTRCS_Pos))) argument
236 #define PWM_SCUP_UPR(value) ((PWM_SCUP_UPR_Msk & ((value) << PWM_SCUP_UPR_Pos))) argument
239 #define PWM_SCUP_UPRCNT(value) ((PWM_SCUP_UPRCNT_Msk & ((value) << PWM_SCUP_UPRCNT_Pos))) argument
243 #define PWM_SCUPUPD_UPRUPD(value) ((PWM_SCUPUPD_UPRUPD_Msk & ((value) << PWM_SCUPUPD_UPRUPD_Pos))) argument
385 #define PWM_FMR_FPOL(value) ((PWM_FMR_FPOL_Msk & ((value) << PWM_FMR_FPOL_Pos))) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam/include/samv71/component/ |
| D | icm.h | 86 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
98 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
107 #define ICM_CFG_HAPROT(value) (ICM_CFG_HAPROT_Msk & ((value) << ICM_CFG_HAPROT_Pos)) argument
110 #define ICM_CFG_DAPROT(value) (ICM_CFG_DAPROT_Msk & ((value) << ICM_CFG_DAPROT_Pos)) argument
147 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
150 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
153 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
181 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
184 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
212 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd21/component/ |
| D | nvmctrl.h | 58 #define NVMCTRL_CTRLA_CMD(value) (NVMCTRL_CTRLA_CMD_Msk & ((value) << NVMCTRL_CTRLA_CMD_Pos)) argument
87 #define NVMCTRL_CTRLA_CMDEX(value) (NVMCTRL_CTRLA_CMDEX_Msk & ((value) << NVMCTRL_CTRLA_CMDEX_Pos)) argument
115 #define NVMCTRL_CTRLB_RWS(value) (NVMCTRL_CTRLB_RWS_Msk & ((value) << NVMCTRL_CTRLB_RWS_Pos)) argument
126 #define NVMCTRL_CTRLB_SLEEPPRM(value) (NVMCTRL_CTRLB_SLEEPPRM_Msk & ((value) << NVMCTRL_CTRLB_SLEEP… argument
135 #define NVMCTRL_CTRLB_READMODE(value) (NVMCTRL_CTRLB_READMODE_Msk & ((value) << NVMCTRL_CTRLB_READM… argument
163 #define NVMCTRL_PARAM_NVMP(value) (NVMCTRL_PARAM_NVMP_Msk & ((value) << NVMCTRL_PARAM_NVMP_Pos)) argument
166 #define NVMCTRL_PARAM_PSZ(value) (NVMCTRL_PARAM_PSZ_Msk & ((value) << NVMCTRL_PARAM_PSZ_Pos)) argument
298 #define NVMCTRL_ADDR_ADDR(value) (NVMCTRL_ADDR_ADDR_Msk & ((value) << NVMCTRL_ADDR_ADDR_Pos)) argument
315 #define NVMCTRL_LOCK_LOCK(value) (NVMCTRL_LOCK_LOCK_Msk & ((value) << NVMCTRL_LOCK_LOCK_Pos)) argument
364 #define ADC_FUSES_BIASCAL(value) (ADC_FUSES_BIASCAL_Msk & ((value) << ADC_FUSES_BIASCAL_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam0/include/samr21/component/ |
| D | nvmctrl.h | 58 #define NVMCTRL_CTRLA_CMD(value) (NVMCTRL_CTRLA_CMD_Msk & ((value) << NVMCTRL_CTRLA_CMD_Pos)) argument
87 #define NVMCTRL_CTRLA_CMDEX(value) (NVMCTRL_CTRLA_CMDEX_Msk & ((value) << NVMCTRL_CTRLA_CMDEX_Pos)) argument
115 #define NVMCTRL_CTRLB_RWS(value) (NVMCTRL_CTRLB_RWS_Msk & ((value) << NVMCTRL_CTRLB_RWS_Pos)) argument
126 #define NVMCTRL_CTRLB_SLEEPPRM(value) (NVMCTRL_CTRLB_SLEEPPRM_Msk & ((value) << NVMCTRL_CTRLB_SLEEP… argument
135 #define NVMCTRL_CTRLB_READMODE(value) (NVMCTRL_CTRLB_READMODE_Msk & ((value) << NVMCTRL_CTRLB_READM… argument
163 #define NVMCTRL_PARAM_NVMP(value) (NVMCTRL_PARAM_NVMP_Msk & ((value) << NVMCTRL_PARAM_NVMP_Pos)) argument
166 #define NVMCTRL_PARAM_PSZ(value) (NVMCTRL_PARAM_PSZ_Msk & ((value) << NVMCTRL_PARAM_PSZ_Pos)) argument
298 #define NVMCTRL_ADDR_ADDR(value) (NVMCTRL_ADDR_ADDR_Msk & ((value) << NVMCTRL_ADDR_ADDR_Pos)) argument
315 #define NVMCTRL_LOCK_LOCK(value) (NVMCTRL_LOCK_LOCK_Msk & ((value) << NVMCTRL_LOCK_LOCK_Pos)) argument
364 #define ADC_FUSES_BIASCAL(value) (ADC_FUSES_BIASCAL_Msk & ((value) << ADC_FUSES_BIASCAL_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam/include/same70b/component/ |
| D | icm.h | 83 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
95 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
138 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
141 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
144 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
172 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
175 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
203 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
206 #define ICM_IER_RDM(value) (ICM_IER_RDM_Msk & ((value) << ICM_IER_RDM_Pos)) argument
209 #define ICM_IER_RBE(value) (ICM_IER_RBE_Msk & ((value) << ICM_IER_RBE_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam/include/samv71b/component/ |
| D | icm.h | 83 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
95 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
138 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
141 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
144 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
172 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
175 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
203 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
206 #define ICM_IER_RDM(value) (ICM_IER_RDM_Msk & ((value) << ICM_IER_RDM_Pos)) argument
209 #define ICM_IER_RBE(value) (ICM_IER_RBE_Msk & ((value) << ICM_IER_RBE_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam/include/same70/component/ |
| D | icm.h | 83 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
95 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
138 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
141 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
144 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
172 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
175 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
203 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
206 #define ICM_IER_RDM(value) (ICM_IER_RDM_Msk & ((value) << ICM_IER_RDM_Pos)) argument
209 #define ICM_IER_RBE(value) (ICM_IER_RBE_Msk & ((value) << ICM_IER_RBE_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam0/include/same51/component/ |
| D | icm.h | 76 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
85 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
94 #define ICM_CFG_HAPROT(value) (ICM_CFG_HAPROT_Msk & ((value) << ICM_CFG_HAPROT_Pos)) argument
97 #define ICM_CFG_DAPROT(value) (ICM_CFG_DAPROT_Msk & ((value) << ICM_CFG_DAPROT_Pos)) argument
127 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
130 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
133 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
157 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
160 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
184 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd51/component/ |
| D | icm.h | 76 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
85 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
94 #define ICM_CFG_HAPROT(value) (ICM_CFG_HAPROT_Msk & ((value) << ICM_CFG_HAPROT_Pos)) argument
97 #define ICM_CFG_DAPROT(value) (ICM_CFG_DAPROT_Msk & ((value) << ICM_CFG_DAPROT_Pos)) argument
127 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
130 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
133 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
157 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
160 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
184 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
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| /hal_atmel-3.5.0-3.4.0/asf/sam0/include/same53/component/ |
| D | icm.h | 76 #define ICM_CFG_BBC(value) (ICM_CFG_BBC_Msk & ((value) << ICM_CFG_BBC_Pos)) argument
85 #define ICM_CFG_UALGO(value) (ICM_CFG_UALGO_Msk & ((value) << ICM_CFG_UALGO_Pos)) argument
94 #define ICM_CFG_HAPROT(value) (ICM_CFG_HAPROT_Msk & ((value) << ICM_CFG_HAPROT_Pos)) argument
97 #define ICM_CFG_DAPROT(value) (ICM_CFG_DAPROT_Msk & ((value) << ICM_CFG_DAPROT_Pos)) argument
127 #define ICM_CTRL_REHASH(value) (ICM_CTRL_REHASH_Msk & ((value) << ICM_CTRL_REHASH_Pos)) argument
130 #define ICM_CTRL_RMDIS(value) (ICM_CTRL_RMDIS_Msk & ((value) << ICM_CTRL_RMDIS_Pos)) argument
133 #define ICM_CTRL_RMEN(value) (ICM_CTRL_RMEN_Msk & ((value) << ICM_CTRL_RMEN_Pos)) argument
157 #define ICM_SR_RAWRMDIS(value) (ICM_SR_RAWRMDIS_Msk & ((value) << ICM_SR_RAWRMDIS_Pos)) argument
160 #define ICM_SR_RMDIS(value) (ICM_SR_RMDIS_Msk & ((value) << ICM_SR_RMDIS_Pos)) argument
184 #define ICM_IER_RHC(value) (ICM_IER_RHC_Msk & ((value) << ICM_IER_RHC_Pos)) argument
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