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Searched defs:dma (Results 1 – 21 of 21) sorted by relevance

/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_dma.h152 #define DMA_CHCTL(dma, channel) REG32(((dma) + 0x08U) + 0x14U * (uint32_t)(channel)) … argument
153 #define DMA_CHCNT(dma, channel) REG32(((dma) + 0x0CU) + 0x14U * (uint32_t)(channel)) … argument
154 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x10U) + 0x14U * (uint32_t)(channel)) … argument
155 #define DMA_CHMADDR(dma, channel) REG32(((dma) + 0x14U) + 0x14U * (uint32_t)(channel)) … argument
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_dma.h152 #define DMA_CHCTL(dma, channel) REG32(((dma) + 0x00000008U) + 0x00000014U * (uint32_t)(… argument
153 #define DMA_CHCNT(dma, channel) REG32(((dma) + 0x0000000CU) + 0x00000014U * (uint32_t)(… argument
154 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x00000010U) + 0x00000014U * (uint32_t)(… argument
155 #define DMA_CHMADDR(dma, channel) REG32(((dma) + 0x00000014U) + 0x00000014U * (uint32_t)(… argument
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_dma.h151 #define DMA_CHCTL(dma, channel) REG32(((dma) + 0x08U) + 0x14U * (uint32_t)(channel)) … argument
152 #define DMA_CHCNT(dma, channel) REG32(((dma) + 0x0CU) + 0x14U * (uint32_t)(channel)) … argument
153 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x10U) + 0x14U * (uint32_t)(channel)) … argument
154 #define DMA_CHMADDR(dma, channel) REG32(((dma) + 0x14U) + 0x14U * (uint32_t)(channel)) … argument
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_dma.h145 #define DMA_CHCTL(dma, channel) REG32(((dma) + 0x08U) + 0x14U * (uint32_t)(channel)) … argument
146 #define DMA_CHCNT(dma, channel) REG32(((dma) + 0x0CU) + 0x14U * (uint32_t)(channel)) … argument
147 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x10U) + 0x14U * (uint32_t)(channel)) … argument
148 #define DMA_CHMADDR(dma, channel) REG32(((dma) + 0x14U) + 0x14U * (uint32_t)(channel)) … argument
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dma.h230 #define DMA_CHCTL(dma,channel) REG32(((dma) + 0x10U) + 0x18U*(channel)) /*!< the addres… argument
231 #define DMA_CHCNT(dma,channel) REG32(((dma) + 0x14U) + 0x18U*(channel)) /*!< the addres… argument
232 #define DMA_CHPADDR(dma,channel) REG32(((dma) + 0x18U) + 0x18U*(channel)) /*!< the addres… argument
233 #define DMA_CHM0ADDR(dma,channel) REG32(((dma) + 0x1CU) + 0x18U*(channel)) /*!< the addres… argument
234 #define DMA_CHM1ADDR(dma,channel) REG32(((dma) + 0x20U) + 0x18U*(channel)) /*!< the addres… argument
235 #define DMA_CHFCTL(dma,channel) REG32(((dma) + 0x24U) + 0x18U*(channel)) /*!< the addres… argument
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_spi.c382 void spi_dma_enable(uint32_t spi_periph, uint8_t dma) in spi_dma_enable()
401 void spi_dma_disable(uint32_t spi_periph, uint8_t dma) in spi_dma_disable()
Dgd32vf103_timer.c404 void timer_dma_enable(uint32_t timer_periph, uint16_t dma) in timer_dma_enable()
424 void timer_dma_disable(uint32_t timer_periph, uint16_t dma) in timer_dma_disable()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_spi.c345 void spi_dma_enable(uint32_t spi_periph, uint8_t dma) in spi_dma_enable()
364 void spi_dma_disable(uint32_t spi_periph, uint8_t dma) in spi_dma_disable()
Dgd32f3x0_timer.c567 void timer_dma_enable(uint32_t timer_periph, uint16_t dma) in timer_dma_enable()
587 void timer_dma_disable(uint32_t timer_periph, uint16_t dma) in timer_dma_disable()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_spi.c399 void spi_dma_enable(uint32_t spi_periph, uint8_t dma) in spi_dma_enable()
418 void spi_dma_disable(uint32_t spi_periph, uint8_t dma) in spi_dma_disable()
Dgd32e10x_timer.c437 void timer_dma_enable(uint32_t timer_periph, uint16_t dma) in timer_dma_enable()
457 void timer_dma_disable(uint32_t timer_periph, uint16_t dma) in timer_dma_disable()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_spi.c407 void spi_dma_enable(uint32_t spi_periph, uint8_t dma) in spi_dma_enable()
426 void spi_dma_disable(uint32_t spi_periph, uint8_t dma) in spi_dma_disable()
Dgd32e50x_timer.c436 void timer_dma_enable(uint32_t timer_periph, uint16_t dma) in timer_dma_enable()
456 void timer_dma_disable(uint32_t timer_periph, uint16_t dma) in timer_dma_disable()
Dgd32e50x_i2c.c1392 void i2c2_dma_enable(uint32_t i2c_periph, uint8_t dma) in i2c2_dma_enable()
1411 void i2c2_dma_disable(uint32_t i2c_periph, uint8_t dma) in i2c2_dma_disable()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_i2c.c595 void i2c_dma_enable(uint32_t i2c_periph, uint8_t dma) in i2c_dma_enable()
614 void i2c_dma_disable(uint32_t i2c_periph, uint8_t dma) in i2c_dma_disable()
Dgd32l23x_timer.c366 void timer_dma_enable(uint32_t timer_periph, uint16_t dma) in timer_dma_enable()
385 void timer_dma_disable(uint32_t timer_periph, uint16_t dma) in timer_dma_disable()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_i2c.c566 void i2c_dma_enable(uint32_t i2c_periph, uint8_t dma) in i2c_dma_enable()
585 void i2c_dma_disable(uint32_t i2c_periph, uint8_t dma) in i2c_dma_disable()
Dgd32a50x_timer.c441 void timer_dma_enable(uint32_t timer_periph, uint32_t dma) in timer_dma_enable()
465 void timer_dma_disable(uint32_t timer_periph, uint32_t dma) in timer_dma_disable()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c431 void timer_dma_enable(uint32_t timer_periph, uint16_t dma) in timer_dma_enable()
451 void timer_dma_disable(uint32_t timer_periph, uint16_t dma) in timer_dma_disable()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c563 void timer_dma_enable(uint32_t timer_periph, uint16_t dma) in timer_dma_enable()
583 void timer_dma_disable(uint32_t timer_periph, uint16_t dma) in timer_dma_disable()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_dma.h374 #define DMA_CHCTL(dma, channel) REG32(((dma) + 0x00000008U) + 0x14U * (uint32_t)(ch… argument
375 #define DMA_CHCNT(dma, channel) REG32(((dma) + 0x0000000CU) + 0x14U * (uint32_t)(ch… argument
376 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x00000010U) + 0x14U * (uint32_t)(ch… argument
377 #define DMA_CHMADDR(dma, channel) REG32(((dma) + 0x00000014U) + 0x14U * (uint32_t)(ch… argument