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Searched defs:XSPI_CCR_ISIZE_1 (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h10980 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x000… macro
Dstm32h533xx.h11389 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x000… macro
Dstm32h562xx.h11706 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x000… macro
Dstm32h573xx.h14199 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x000… macro
Dstm32h563xx.h13790 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x000… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h12072 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u535xx.h11672 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u575xx.h12707 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u585xx.h13156 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u595xx.h13022 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u5a5xx.h13471 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u5f7xx.h14520 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u599xx.h16741 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u5g7xx.h14969 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u5f9xx.h17646 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u5a9xx.h17190 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
Dstm32u5g9xx.h18095 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7s7xx.h14352 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro
Dstm32h7s3xx.h13950 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro
Dstm32h7r3xx.h13318 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro
Dstm32h7r7xx.h13718 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39356 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro
Dstm32n657xx.h40995 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro
Dstm32n655xx.h40606 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro
Dstm32n647xx.h39745 #define XSPI_CCR_ISIZE_1 (0x2UL << XSPI_CCR_ISIZE_Pos) /*!< 0x00000020 */ macro