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Searched defs:SRAM2_BASE_NS (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h886 #define SRAM2_BASE_NS 0x20010000UL /*!< SRAM2 non-secure base address … macro
Dstm32wba54xx.h1046 #define SRAM2_BASE_NS 0x20010000UL /*!< SRAM2 non-secure base address … macro
Dstm32wba52xx.h984 #define SRAM2_BASE_NS 0x20010000UL /*!< SRAM2 non-secure base address … macro
Dstm32wba5mxx.h1046 #define SRAM2_BASE_NS 0x20010000UL /*!< SRAM2 non-secure base address … macro
Dstm32wba55xx.h1046 #define SRAM2_BASE_NS 0x20010000UL /*!< SRAM2 non-secure base address … macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h1179 #define SRAM2_BASE_NS (0x20004000UL) /*!< SRAM2 (16 KB) non-secure base address … macro
Dstm32h523xx.h1483 #define SRAM2_BASE_NS (0x20020000UL) /*!< SRAM2 (80 KB) non-secure base address … macro
Dstm32h533xx.h1547 #define SRAM2_BASE_NS (0x20020000UL) /*!< SRAM2 (80 KB) non-secure base address … macro
Dstm32h562xx.h1572 #define SRAM2_BASE_NS (0x20040000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32h573xx.h1814 #define SRAM2_BASE_NS (0x20040000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32h563xx.h1750 #define SRAM2_BASE_NS (0x20040000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h1347 #define SRAM2_BASE_NS (0x20030000UL) /*!< SRAM2(64 KB) base address */ macro
Dstm32l562xx.h1421 #define SRAM2_BASE_NS (0x20030000UL) /*!< SRAM2(64 KB) base address */ macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1518 #define SRAM2_BASE_NS (0x20030000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u535xx.h1440 #define SRAM2_BASE_NS (0x20030000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u575xx.h1654 #define SRAM2_BASE_NS (0x20030000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u585xx.h1733 #define SRAM2_BASE_NS (0x20030000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u595xx.h1705 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u5a5xx.h1784 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u5f7xx.h1868 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u599xx.h1886 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u5g7xx.h1947 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u5f9xx.h1972 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u5a9xx.h1965 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro
Dstm32u5g9xx.h2051 #define SRAM2_BASE_NS (0x200C0000UL) /*!< SRAM2 (64 KB) non-secure base address … macro