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Searched defs:MCUX_IMX_INPUT_ENABLE (Results 1 – 10 of 10) sorted by relevance

/Zephyr-Core-3.5.0/soc/arm64/nxp_imx/mimx9/
Dpinctrl_soc.h26 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/mimx8ml8_m7/
Dpinctrl_soc.h25 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/mimx8mq6_m4/
Dpinctrl_soc.h25 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/xtensa/nxp_adsp/imx8m/include/
Dpinctrl_soc.h25 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/mimx8mm6_m4/
Dpinctrl_soc.h25 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/arm64/nxp_imx/mimx8m/
Dpinctrl_soc.h25 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/mcimx7_m4/
Dpinctrl_soc.h27 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/rt/
Dpinctrl_rt10xx.h28 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
Dpinctrl_rt11xx.h30 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/mcimx6x_m4/
Dpinctrl_soc.h31 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) macro