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Searched defs:LPMCSR (Results 1 – 25 of 54) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f070x6.h442 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32f070xb.h451 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32f072xb.h611 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32f042x6.h561 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32f078xx.h611 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32f048xx.h561 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h586 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l072xx.h599 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l062xx.h605 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l063xx.h619 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l053xx.h600 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l073xx.h613 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l083xx.h632 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l082xx.h618 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h537 __IO uint32_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h537 __IO uint32_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32g0c1xx.h687 __IO uint32_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32g0b1xx.h686 __IO uint32_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u083xx.h783 __IO uint32_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32u073xx.h749 __IO uint32_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h770 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
Dstm32l412xx.h769 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h738 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f302x8.h663 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h839 …__IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ member

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