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Searched defs:INT_MASK (Results 1 – 25 of 52) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h4088 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
16441 __IO uint32_t INT_MASK; /**< TRNG Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h4088 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
16441 __IO uint32_t INT_MASK; /**< TRNG Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h3854 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
18737 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
DK32L3A60_cm4.h4704 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
18687 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h8744 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
24179 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h8738 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
25159 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h7306 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW41Z4/
DMKW41Z4.h7306 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h7235 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4.h8219 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h25262 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h8219 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h8219 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h27028 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h28358 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
DMIMXRT685S_cm33.h38238 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h23813 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h23815 __IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h29659 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h31601 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h31600 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h32707 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h38238 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h42207 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h38203 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member

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