| /loramac-node-3.4.0/src/boards/mcu/saml21/cmsis/ |
| D | core_cm0.h | 341 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
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| D | core_cm0plus.h | 356 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
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| D | core_sc000.h | 347 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
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| D | core_cm3.h | 355 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
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| D | core_sc300.h | 355 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
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| D | core_cm4.h | 402 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
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| D | core_cm7.h | 417 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
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| /loramac-node-3.4.0/src/boards/mcu/stm32/cmsis/ |
| D | core_cm0.h | 396 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
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| D | core_cm0plus.h | 414 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
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| D | core_sc000.h | 402 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
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| D | core_cm3.h | 424 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
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| D | core_sc300.h | 424 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
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| D | core_cm4.h | 492 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
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| D | core_cm7.h | 507 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
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| /loramac-node-3.4.0/src/boards/SKiM980A/cmsis/ |
| D | stm32l151xba.h | 192 …__IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1… member
262 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
356 …__IO uint32_t CCR; /*!< I2C Clock control register, Address offset: 0x1C… member
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| /loramac-node-3.4.0/src/boards/SKiM880B/cmsis/ |
| D | stm32l151xba.h | 192 …__IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1… member
262 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
356 …__IO uint32_t CCR; /*!< I2C Clock control register, Address offset: 0x1C… member
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| /loramac-node-3.4.0/src/boards/NAMote72/cmsis/ |
| D | stm32l152xc.h | 201 …__IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1… member
271 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
386 …__IO uint32_t CCR; /*!< I2C Clock control register, Address offset: 0x1C… member
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| /loramac-node-3.4.0/src/boards/NucleoL152/cmsis/ |
| D | stm32l152xe.h | 203 …__IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1… member
273 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
395 …__IO uint32_t CCR; /*!< I2C Clock control register, Address offset: 0x1C… member
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| /loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/ |
| D | stm32l081xx.h | 163 __IO uint32_t CCR; member
235 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
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| /loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/ |
| D | stm32l072xx.h | 165 __IO uint32_t CCR; member
252 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
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| /loramac-node-3.4.0/src/boards/NucleoL476/cmsis/ |
| D | stm32l476xx.h | 240 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
360 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
423 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
687 …__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset… member
993 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
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| /loramac-node-3.4.0/src/boards/NucleoL073/cmsis/ |
| D | stm32l073xx.h | 166 __IO uint32_t CCR; member
253 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
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