Lines Matching +full:- +full:v
6 // (See accompanying file LICENSE-Apache or copy at
7 // http://www.apache.org/licenses/LICENSE-2.0)
11 // (See accompanying file LICENSE-Boost or copy at
19 // -DRYU_DEBUG Generate verbose debugging output to stdout.
34 // Returns the number of decimal digits in v, which must not contain more than 9 digits.
35 static int decimalLength9(const uint32_t v) { in decimalLength9() argument
38 while (c <= v) { in decimalLength9()
48 // Decimal exponent's range is -45 to 38
61 e2 = 1 - FLOAT_BIAS - FLOAT_MANTISSA_BITS - 2; in f2d()
64 e2 = (int32_t) ieeeExponent - FLOAT_BIAS - FLOAT_MANTISSA_BITS - 2; in f2d()
72 printf("-> %u * 2^%d\n", m2, e2 + 2); in f2d()
78 // Implicit bool -> int conversion. True is 1, false is 0. in f2d()
80 const uint32_t mm = 4 * m2 - 1 - mmShift; in f2d()
82 // Step 3: Convert to a decimal power base using 64-bit arithmetic. in f2d()
91 const int32_t k = FLOAT_POW5_INV_BITCOUNT + pow5bits((int32_t) q) - 1; in f2d()
92 const int32_t i = -e2 + (int32_t) q + k; in f2d()
98 printf("V+=%u\nV =%u\nV-=%u\n", vp, vr, vm); in f2d()
100 if (q != 0 && (vp - 1) / 10 <= vm / 10) { in f2d()
102 // q = X - 1 above, except that would require 33 bits for the result, and we've found that in f2d()
103 // 32-bit arithmetic is faster even on 64-bit machines. in f2d()
104 const int32_t l = FLOAT_POW5_INV_BITCOUNT + pow5bits((int32_t) (q - 1)) - 1; in f2d()
105 lastRemovedDigit = (uint8_t) (mulPow5InvDivPow2(mv, q - 1, -e2 + (int32_t) q - 1 + l) % 10); in f2d()
115 vp -= multipleOfPowerOf5_32(mp, q); in f2d()
119 const uint32_t q = log10Pow5(-e2); in f2d()
121 const int32_t i = -e2 - (int32_t) q; in f2d()
122 const int32_t k = pow5bits(i) - FLOAT_POW5_BITCOUNT; in f2d()
123 int32_t j = (int32_t) q - k; in f2d()
128 printf("%u * 5^%d / 10^%u\n", mv, -e2, q); in f2d()
130 printf("V+=%u\nV =%u\nV-=%u\n", vp, vr, vm); in f2d()
132 if (q != 0 && (vp - 1) / 10 <= vm / 10) { in f2d()
133 j = (int32_t) q - 1 - (pow5bits(i + 1) - FLOAT_POW5_BITCOUNT); in f2d()
141 // mm = mv - 1 - mmShift, so it has 1 trailing 0 bit iff mmShift == 1. in f2d()
145 --vp; in f2d()
148 vrIsTrailingZeros = multipleOfPowerOf2_32(mv, q - 1); in f2d()
156 printf("V+=%u\nV =%u\nV-=%u\n", vp, vr, vm); in f2d()
170 * -exp - 1 zeros left of the first non-zero in f2d()
171 * digit in 'f' format. If non-negative, in f2d()
185 int exp = e10 + decimalLength9(vr) - 1; in f2d()
189 * When exp is < 0, there are -exp-1 zeros taking up in f2d()
192 * we round that (max_decimals - (-exp - 1)). This in f2d()
220 // as vm - (vm / 10) * 10. in f2d()
221 vmIsTrailingZeros &= vm - (vm / 10) * 10 == 0; in f2d()
233 printf("V+=%u\nV =%u\nV-=%u\n", vp, vr, vm); in f2d()
234 printf("d-10=%s\n", vmIsTrailingZeros ? "true" : "false"); in f2d()
269 int exp = e10 + len - 1; in f2d()
277 len--; in f2d()
286 printf("V+=%u\nV =%u\nV-=%u\n", vp, vr, vm); in f2d()
301 // Step 1: Decode the floating-point number, and unify normalized and subnormal cases. in __ftoa_engine()
306 const uint64_t ieeeMantissa = bits & ((1ull << FLOAT_MANTISSA_BITS) - 1); in __ftoa_engine()
307 …32_t ieeeExponent = (uint32_t) ((bits >> FLOAT_MANTISSA_BITS) & ((1u << FLOAT_EXPONENT_BITS) - 1)); in __ftoa_engine()
316 dtoa->digits[0] = '0'; in __ftoa_engine()
317 dtoa->flags = flags; in __ftoa_engine()
318 dtoa->exp = 0; in __ftoa_engine()
321 if (ieeeExponent == ((1u << FLOAT_EXPONENT_BITS) - 1u)) { in __ftoa_engine()
327 dtoa->flags = flags; in __ftoa_engine()
331 floating_decimal_32 v; in __ftoa_engine() local
333 v = f2d(ieeeMantissa, ieeeExponent, max_digits, fmode, max_decimals); in __ftoa_engine()
335 uint32_t mant = v.mantissa; in __ftoa_engine()
336 int32_t olength = v.olength; in __ftoa_engine()
337 int32_t exp = v.exponent + olength - 1; in __ftoa_engine()
342 dtoa->digits[olength - i - 1] = (mant % 10) + '0'; in __ftoa_engine()
346 dtoa->exp = exp; in __ftoa_engine()
347 dtoa->flags = flags; in __ftoa_engine()