Lines Matching +full:pre +full:- +full:div

4  * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
34 /* PLL Frequency Auto-Calibration Control 0 Register */
44 /* PLL Frequency Auto-Calibration Control 2 Register */
79 return -ERANGE; in chip_get_pll_freq()
122 * MCU div = 0 (PLL / 1 = 48 mhz)
123 * FND div = 0 (PLL / 1 = 48 mhz)
124 * USB div = 0 (PLL / 1 = 48 mhz)
125 * UART div = 1 (PLL / 2 = 24 mhz)
126 * SMB div = 1 (PLL / 2 = 24 mhz)
127 * SSPI div = 1 (PLL / 2 = 24 mhz)
128 * EC div = 6 (FND / 6 = 8 mhz)
129 * JTAG div = 1 (PLL / 2 = 24 mhz)
130 * PWM div = 0 (PLL / 1 = 48 mhz)
131 * USBPD div = 5 (PLL / 6 = 8 mhz)
150 * MCU div = 1 (PLL / 2 = 48 mhz)
151 * FND div = 1 (PLL / 2 = 48 mhz)
152 * USB div = 1 (PLL / 2 = 48 mhz)
153 * UART div = 3 (PLL / 4 = 24 mhz)
154 * SMB div = 3 (PLL / 4 = 24 mhz)
155 * SSPI div = 3 (PLL / 4 = 24 mhz)
156 * EC div = 6 (FND / 6 = 8 mhz)
157 * JTAG div = 3 (PLL / 4 = 24 mhz)
158 * PWM div = 1 (PLL / 2 = 48 mhz)
159 * USBPD div = 11 (PLL / 12 = 8 mhz)
191 IT8XXX2_ECPM_PLLFREQR = pll->pll_freq; in chip_run_pll_sequence()
192 /* Pre-set FND clock frequency = PLL / 3 */ in chip_run_pll_sequence()
195 IT8XXX2_ECPM_SCDCR3 = (pll->div_jtag << 4) | pll->div_ec; in chip_run_pll_sequence()
201 IT8XXX2_ECPM_SCDCR0 = (pll->div_fnd << 4) | pll->div_mcu; in chip_run_pll_sequence()
205 IT8XXX2_ECPM_SCDCR1 = (pll->div_usb << 4) | pll->div_uart; in chip_run_pll_sequence()
207 IT8XXX2_ECPM_SCDCR2 = (pll->div_sspi << 4) | pll->div_smb; in chip_run_pll_sequence()
209 IT8XXX2_ECPM_SCDCR4 = (pll->div_usbpd << 4) | pll->div_pwm; in chip_run_pll_sequence()
214 /* Re-configure PLL clock or not. */ in chip_configure_pll()
215 if (((IT8XXX2_ECPM_PLLFREQR & 0xf) != pll->pll_freq) || in chip_configure_pll()
216 ((IT8XXX2_ECPM_SCDCR0 & 0xf0) != (pll->div_fnd << 4)) || in chip_configure_pll()
217 ((IT8XXX2_ECPM_SCDCR3 & 0xf) != pll->div_ec)) { in chip_configure_pll()
298 * called without interrupts locked. Hence we disable M-mode external in riscv_idle()
322 * register is non-zero. in riscv_idle()
324 * it means that EC waked-up by the above issue not an in riscv_idle()
341 * Enable M-mode external interrupt in riscv_idle()
380 usb_regs->port0_misc_control &= ~PULL_DOWN_EN; in ite_it8xxx2_init()
381 usb_regs->port1_misc_control &= ~PULL_DOWN_EN; in ite_it8xxx2_init()
388 gctrl_regs->GCTRL_WMCR |= BIT(7); in ite_it8xxx2_init()
394 gctrl_regs->GCTRL_MCCR &= ~IT8XXX2_GCTRL_USB_DEBUG_EN; in ite_it8xxx2_init()
397 * Disable this feature that can detect pre-define hardware in ite_it8xxx2_init()
419 gctrl_regs->GCTRL_RSTDMMC |= IT8XXX2_GCTRL_UART1SD; in ite_it8xxx2_init()
421 gctrl_regs->GCTRL_RSTC4 = IT8XXX2_GCTRL_RUART1; in ite_it8xxx2_init()
424 gpio_regs->GPIO_GCR1 |= IT8XXX2_GPIO_U1CTRL_SIN0_SOUT0_EN; in ite_it8xxx2_init()
431 gpio_regs->GPIO_GCR21 &= ~(IT8XXX2_GPIO_GPH1VS | IT8XXX2_GPIO_GPH2VS); in ite_it8xxx2_init()
437 gctrl_regs->GCTRL_RSTDMMC |= IT8XXX2_GCTRL_UART2SD; in ite_it8xxx2_init()
439 gctrl_regs->GCTRL_RSTC4 = IT8XXX2_GCTRL_RUART2; in ite_it8xxx2_init()
442 gpio_regs->GPIO_GCR1 |= IT8XXX2_GPIO_U2CTRL_SIN1_SOUT1_EN; in ite_it8xxx2_init()
467 base->CCGCR |= (IT8XXX2_USBPD_DISABLE_CC | in ite_it8xxx2_init()
473 base->CCCSR |= (IT8XXX2_USBPD_CC2_DISCONNECT | in ite_it8xxx2_init()
478 base->CCPSR |= (IT8XXX2_USBPD_DISCONNECT_POWER_CC2 | in ite_it8xxx2_init()
480 /* Dis-connect 5.1K dead battery resistor to CC */ in ite_it8xxx2_init()
481 base->CCPSR |= (IT8XXX2_USBPD_DISCONNECT_5_1K_CC2_DB | in ite_it8xxx2_init()