Lines Matching +full:40 +full:- +full:pin
2 # SPDX-License-Identifier: Apache-2.0
15 drive-strength = "40-ohm";
16 slew-rate = "slow";
26 input-schmitt-enable: HYS=1
27 bias-pull-up: PUE=1
28 drive-open-drain: ODE=1
29 slew-rate: SRE=<enum_idx>
30 drive-strength: DSE=<enum_idx>
31 input-enable: SION=1 (in SW_MUX_CTL_PAD register)
33 If only required properties are supplied, the pin will have the following
39 SRE=<slew-rate>,
40 DSE=<drive-strength>,
44 compatible: "nxp,imx8m-pinctrl"
48 child-binding:
49 description: iMX pin controller pin group
50 child-binding:
52 iMX pin controller pin configuration node.
55 - name: pincfg-node.yaml
56 property-allowlist:
57 - input-schmitt-enable
58 - drive-open-drain
59 - input-enable
60 - bias-pull-up
61 - bias-pull-down
68 Pin mux selections for this group. See the soc level iomuxc DTSI file
70 drive-strength:
74 - "disabled"
75 - "255-ohm"
76 - "105-ohm"
77 - "75-ohm"
78 - "85-ohm"
79 - "65-ohm"
80 - "45-ohm"
81 - "40-ohm"
83 Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
87 000 HI-Z — Output driver is disabled (Hi-Z State)
93 110 45_OHM — 45 Ohm @3.3V, 45 Ohm @2.5V, 40 Ohm @1.8V, 50 Ohm @1.2V
94 111 40_OHM — 40 Ohm @3.3V, 40 Ohm @2.5V, 33 Ohm @1.8V, 40 Ohm @1.2V
95 slew-rate:
99 - "slow"
100 - "medium"
101 - "fast"
102 - "max"
104 Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral