Lines Matching +full:num +full:- +full:inputs

4  * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
13 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
17 		#address-cells = <1>;
18 		#size-cells = <0>;
21 			compatible = "arm,cortex-m33f";
23 			#address-cells = <1>;
24 			#size-cells = <1>;
27 				compatible = "arm,armv8m-mpu";
35 	#address-cells = <1>;
36 	#size-cells = <1>;
39 		compatible = "zephyr,memory-region", "mmio-sram";
41 		zephyr,memory-region = "SRAMX";
45 		compatible = "zephyr,memory-region", "mmio-sram";
47 		zephyr,memory-region = "SRAM0";
51 		compatible = "zephyr,memory-region", "mmio-sram";
53 		zephyr,memory-region = "SRAM1";
57 		compatible = "zephyr,memory-region", "mmio-sram";
59 		zephyr,memory-region = "SRAM2";
64 		compatible = "zephyr,memory-region", "mmio-sram";
66 		zephyr,memory-region = "USB_SRAM";
67 		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
72 	#address-cells = <1>;
73 	#size-cells = <1>;
76 		compatible = "nxp,lpc-syscon";
78 		#clock-cells = <1>;
80 			compatible = "nxp,lpc-syscon-reset";
81 			#reset-cells = <1>;
85 	iap: flash-controller@34000 {
86 		compatible = "nxp,iap-fmc55";
88 		#address-cells = <1>;
89 		#size-cells = <1>;
93 			compatible = "soc-nv-flash";
95 			erase-block-size = <512>;
96 			write-block-size = <512>;
100 			compatible = "soc-nv-flash";
106 			compatible = "nxp,lpc-uid";
111 			compatible = "soc-nv-flash";
117 		compatible = "nxp,lpc-iocon";
119 		#address-cells = <1>;
120 		#size-cells = <1>;
123 			compatible = "nxp,lpc-iocon-pinctrl";
128 		compatible = "nxp,lpc-gpio";
130 		#address-cells = <1>;
131 		#size-cells = <0>;
134 			compatible = "nxp,lpc-gpio-port";
136 			int-source = "pint";
137 			gpio-controller;
138 			#gpio-cells = <2>;
142 			compatible = "nxp,lpc-gpio-port";
144 			int-source = "pint";
145 			gpio-controller;
146 			#gpio-cells = <2>;
153 		interrupt-controller;
154 		#interrupt-cells = <1>;
155 		#address-cells = <0>;
158 		num-lines = <8>;
159 		num-inputs = <64>;
163 		compatible = "nxp,lpc-ctimer";
167 		clk-source = <3>;
175 		compatible = "nxp,lpc-ctimer";
179 		clk-source = <3>;
187 		compatible = "nxp,lpc-ctimer";
191 		clk-source = <3>;
199 		compatible = "nxp,lpc-ctimer";
203 		clk-source = <3>;
211 		compatible = "nxp,lpc-ctimer";
215 		clk-source = <3>;
223 		compatible = "nxp,lpc-flexcomm";
232 		compatible = "nxp,lpc-flexcomm";
241 		compatible = "nxp,lpc-flexcomm";
250 		compatible = "nxp,lpc-flexcomm";
259 		compatible = "nxp,lpc-flexcomm";
268 		compatible = "nxp,lpc-flexcomm";
277 		compatible = "nxp,lpc-flexcomm";
286 		compatible = "nxp,lpc-flexcomm";
295 		compatible = "nxp,lpc-mcan";
298 		interrupt-names = "int0", "int1";
301 		bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>;
306 		compatible = "nxp,lpc-spi";
312 		#address-cells = <1>;
313 		#size-cells = <0>;
317 		compatible = "nxp,lpc-rng";
326 		num-bidir-endpoints = <6>;
338 	arm,num-irq-priority-bits = <3>;