/*
 * Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/armv8-m.dtsi>
#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include <mem.h>
#include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-m33f";
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <1>;

			mpu: mpu@e000ed90 {
				compatible = "arm,armv8m-mpu";
				reg = <0xe000ed90 0x40>;
			};
		};
	};
};

&sram {
	#address-cells = <1>;
	#size-cells = <1>;

	sramx: memory@4000000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x4000000 DT_SIZE_K(16)>;
		zephyr,memory-region = "SRAMX";
	};

	sram0: memory@20000000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x20000000 DT_SIZE_K(32)>;
		zephyr,memory-region = "SRAM0";
	};

	sram1: memory@20008000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x20008000 DT_SIZE_K(16)>;
		zephyr,memory-region = "SRAM1";
	};

	sram2: memory@2000c000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x2000c000 DT_SIZE_K(16)>;
		zephyr,memory-region = "SRAM2";
	};

	usb_sram: memory@20010000 {
		/* Connected to USB bus*/
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x20010000 DT_SIZE_K(16)>;
		zephyr,memory-region = "USB_SRAM";
		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
	};
};

&peripheral {
	#address-cells = <1>;
	#size-cells = <1>;

	syscon: syscon@0 {
		compatible = "nxp,lpc-syscon";
		reg = <0x0 0x4000>;
		#clock-cells = <1>;
		reset: reset {
			compatible = "nxp,lpc-syscon-reset";
			#reset-cells = <1>;
		};
	};

	iap: flash-controller@34000 {
		compatible = "nxp,iap-fmc55";
		reg = <0x34000 0x18>;
		#address-cells = <1>;
		#size-cells = <1>;
		status = "disabled";

		flash0: flash@0 {
			compatible = "soc-nv-flash";
			reg = <0x0 DT_SIZE_K(246)>;
			erase-block-size = <512>;
			write-block-size = <512>;
		};

		flash_reserved: flash@3d800 {
			compatible = "soc-nv-flash";
			reg = <0x0003d800 DT_SIZE_K(10)>;
			status = "disabled";
		};

		uuid: flash@3fc70 {
			compatible = "nxp,lpc-uid";
			reg = <0x3fc70 0x10>;
		};

		boot_rom: flash@3000000 {
			compatible = "soc-nv-flash";
			reg = <0x3000000 DT_SIZE_K(128)>;
		};
	};

	iocon: iocon@1000 {
		compatible = "nxp,lpc-iocon";
		reg = <0x1000 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x1000 0x100>;
		pinctrl: pinctrl {
			compatible = "nxp,lpc-iocon-pinctrl";
		};
	};

	gpio: gpio@8c000 {
		compatible = "nxp,lpc-gpio";
		reg = <0x8c000 0x2488>;
		#address-cells = <1>;
		#size-cells = <0>;

		gpio0: gpio@0 {
			compatible = "nxp,lpc-gpio-port";
			reg = <0>;
			int-source = "pint";
			gpio-controller;
			#gpio-cells = <2>;
		};

		gpio1: gpio@1 {
			compatible = "nxp,lpc-gpio-port";
			reg = <1>;
			int-source = "pint";
			gpio-controller;
			#gpio-cells = <2>;
		};
	};

	pint: pint@4000 {
		compatible = "nxp,pint";
		reg = <0x4000 0x1000>;
		interrupt-controller;
		#interrupt-cells = <1>;
		#address-cells = <0>;
		interrupts = <4 2>, <5 2>, <6 2>, <7 2>,
			<32 2>, <33 2>, <34 2>, <35 2>;
		num-lines = <8>;
		num-inputs = <64>;
	};

	ctimer0: ctimer@8000 {
		compatible = "nxp,lpc-ctimer";
		reg = <0x8000 0x1000>;
		interrupts = <10 0>;
		status = "disabled";
		clk-source = <3>;
		clocks = <&syscon MCUX_CTIMER0_CLK>;
		mode = <0>;
		input = <0>;
		prescale = <0>;
	};

	ctimer1: ctimer@9000 {
		compatible = "nxp,lpc-ctimer";
		reg = <0x9000 0x1000>;
		interrupts = <11 0>;
		status = "disabled";
		clk-source = <3>;
		clocks = <&syscon MCUX_CTIMER1_CLK>;
		mode = <0>;
		input = <0>;
		prescale = <0>;
	};

	ctimer2: ctimer@28000 {
		compatible = "nxp,lpc-ctimer";
		reg = <0x28000 0x1000>;
		interrupts = <36 0>;
		status = "disabled";
		clk-source = <3>;
		clocks = <&syscon MCUX_CTIMER2_CLK>;
		mode = <0>;
		input = <0>;
		prescale = <0>;
	};

	ctimer3: ctimer@29000 {
		compatible = "nxp,lpc-ctimer";
		reg = <0x29000 0x1000>;
		interrupts = <13 0>;
		status = "disabled";
		clk-source = <3>;
		clocks = <&syscon MCUX_CTIMER3_CLK>;
		mode = <0>;
		input = <0>;
		prescale = <0>;
	};

	ctimer4: ctimer@2A000 {
		compatible = "nxp,lpc-ctimer";
		reg = <0x2A000 0x1000>;
		interrupts = <37 0>;
		status = "disabled";
		clk-source = <3>;
		clocks = <&syscon MCUX_CTIMER4_CLK>;
		mode = <0>;
		input = <0>;
		prescale = <0>;
	};

	flexcomm0: flexcomm@86000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x86000 0x1000>;
		interrupts = <14 0>;
		clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 11)>;
		status = "disabled";
	};

	flexcomm1: flexcomm@87000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x87000 0x1000>;
		interrupts = <15 0>;
		clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 12)>;
		status = "disabled";
	};

	flexcomm2: flexcomm@88000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x88000 0x1000>;
		interrupts = <16 0>;
		clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 13)>;
		status = "disabled";
	};

	flexcomm3: flexcomm@89000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x89000 0x1000>;
		interrupts = <17 0>;
		clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 14)>;
		status = "disabled";
	};

	flexcomm4: flexcomm@8a000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x8a000 0x1000>;
		interrupts = <18 0>;
		clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 15)>;
		status = "disabled";
	};

	flexcomm5: flexcomm@96000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x96000 0x1000>;
		interrupts = <19 0>;
		clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 16)>;
		status = "disabled";
	};

	flexcomm6: flexcomm@97000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x97000 0x1000>;
		interrupts = <20 0>;
		clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 17)>;
		status = "disabled";
	};

	flexcomm7: flexcomm@98000 {
		compatible = "nxp,lpc-flexcomm";
		reg = <0x98000 0x1000>;
		interrupts = <21 0>;
		clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 18)>;
		status = "disabled";
	};

	can0: can@9d000 {
		compatible = "nxp,lpc-mcan";
		reg = <0x9d000 0x1000>;
		interrupts = <43 0>, <44 0>;
		interrupt-names = "int0", "int1";
		clocks = <&syscon MCUX_MCAN_CLK>;
		resets = <&reset NXP_SYSCON_RESET(1, 7)>;
		bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>;
		status = "disabled";
	};

	hs_lspi: spi@9f000 {
		compatible = "nxp,lpc-spi";
		reg = <0x9f000 0x1000>;
		interrupts = <59 0>;
		clocks = <&syscon MCUX_HS_SPI_CLK>;
		resets = <&reset NXP_SYSCON_RESET(2, 28)>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	rng: rng@3a000 {
		compatible = "nxp,lpc-rng";
		reg = <0x3a000 0x1000>;
		status = "okay";
	};

	usbhs: usbhs@94000 {
		compatible = "nxp,lpcip3511";
		reg = <0x94000 0x1000>;
		interrupts = <47 1>;
		num-bidir-endpoints = <6>;
		status = "disabled";
	};

	usbphy1: usbphy@38000 {
		compatible = "nxp,usbphy";
		reg = <0x38000 0x1000>;
		status = "disabled";
	};
};

&nvic {
	arm,num-irq-priority-bits = <3>;
};