Lines Matching +full:0 +full:- +full:64
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/clock/imx95_clock.h>
9 #include <dt-bindings/i2c/i2c.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
17 cpu@0 {
19 compatible = "arm,cortex-m7";
20 reg = <0>;
22 #address-cells = <1>;
23 #size-cells = <1>;
26 compatible = "arm,armv7m-mpu";
27 reg = <0xe000ed90 0x40>;
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
37 compatible = "arm,scmi-shmem";
38 reg = <0x44611000 0x80>;
46 mboxes = <&mu5 0>;
47 mbox-names = "tx";
49 #address-cells = <1>;
50 #size-cells = <0>;
53 compatible = "arm,scmi-clock";
54 reg = <0x14>;
55 #clock-cells = <1>;
59 compatible = "arm,scmi-pinctrl";
60 reg = <0x19>;
63 compatible = "nxp,imx95-pinctrl", "nxp,imx93-pinctrl";
70 itcm: itcm@0 {
71 compatible = "nxp,imx-itcm";
72 reg = <0x0 DT_SIZE_K(256)>;
76 compatible = "nxp,imx-dtcm";
77 reg = <0x20000000 DT_SIZE_K(256)>;
82 reg = <0x42000000 (DT_SIZE_K(64) * 33)>;
83 valid-channels = <30>, <31>;
84 interrupts = <143 0>, <143 0>;
85 #dma-cells = <2>;
90 compatible = "nxp,kinetis-tpm";
91 reg = <0x424e0000 0x88>;
92 interrupts = <73 0>;
96 #pwm-cells = <3>;
100 compatible = "nxp,kinetis-tpm";
101 reg = <0x424f0000 0x88>;
102 interrupts = <74 0>;
106 #pwm-cells = <3>;
110 compatible = "nxp,kinetis-tpm";
111 reg = <0x42500000 0x88>;
112 interrupts = <75 0>;
116 #pwm-cells = <3>;
120 compatible = "nxp,kinetis-tpm";
121 reg = <0x42510000 0x88>;
122 interrupts = <76 0>;
126 #pwm-cells = <3>;
131 clock-frequency = <I2C_BITRATE_STANDARD>;
132 #address-cells = <1>;
133 #size-cells = <0>;
134 reg = <0x42530000 0x4000>;
135 interrupts = <58 0>;
142 clock-frequency = <I2C_BITRATE_STANDARD>;
143 #address-cells = <1>;
144 #size-cells = <0>;
145 reg = <0x42540000 0x4000>;
146 interrupts = <59 0>;
152 compatible = "nxp,imx-lpuart", "nxp,lpuart";
153 reg = <0x42570000 DT_SIZE_K(64)>;
154 interrupts = <64 3>;
160 compatible = "nxp,imx-lpuart", "nxp,lpuart";
161 reg = <0x42580000 DT_SIZE_K(64)>;
168 compatible = "nxp,imx-lpuart", "nxp,lpuart";
169 reg = <0x42590000 DT_SIZE_K(64)>;
176 compatible = "nxp,imx-lpuart", "nxp,lpuart";
177 reg = <0x425a0000 DT_SIZE_K(64)>;
184 compatible = "nxp,dai-sai";
185 reg = <0x42650000 DT_SIZE_K(64)>;
187 clock-names = "mclk1";
188 interrupts = <170 0>;
189 dai-index = <3>;
190 mclk-is-output;
192 dma-names = "tx", "rx";
197 compatible = "nxp,imx-lpuart", "nxp,lpuart";
198 reg = <0x42690000 DT_SIZE_K(64)>;
205 compatible = "nxp,imx-lpuart", "nxp,lpuart";
206 reg = <0x426a0000 DT_SIZE_K(64)>;
214 clock-frequency = <I2C_BITRATE_STANDARD>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 reg = <0x426b0000 0x4000>;
218 interrupts = <181 0>;
225 clock-frequency = <I2C_BITRATE_STANDARD>;
226 #address-cells = <1>;
227 #size-cells = <0>;
228 reg = <0x426c0000 0x4000>;
229 interrupts = <182 0>;
236 clock-frequency = <I2C_BITRATE_STANDARD>;
237 #address-cells = <1>;
238 #size-cells = <0>;
239 reg = <0x426d0000 0x4000>;
240 interrupts = <183 0>;
247 clock-frequency = <I2C_BITRATE_STANDARD>;
248 #address-cells = <1>;
249 #size-cells = <0>;
250 reg = <0x426e0000 0x4000>;
251 interrupts = <184 0>;
257 compatible = "nxp,kinetis-tpm";
258 reg = <0x44310000 0x88>;
259 interrupts = <29 0>;
263 #pwm-cells = <3>;
267 compatible = "nxp,kinetis-tpm";
268 reg = <0x44320000 0x88>;
269 interrupts = <30 0>;
273 #pwm-cells = <3>;
278 clock-frequency = <I2C_BITRATE_STANDARD>;
279 #address-cells = <1>;
280 #size-cells = <0>;
281 reg = <0x44340000 0x4000>;
282 interrupts = <13 0>;
289 clock-frequency = <I2C_BITRATE_STANDARD>;
290 #address-cells = <1>;
291 #size-cells = <0>;
292 reg = <0x44350000 0x4000>;
293 interrupts = <14 0>;
299 compatible = "nxp,imx-lpuart", "nxp,lpuart";
300 reg = <0x44380000 DT_SIZE_K(64)>;
307 compatible = "nxp,imx-lpuart", "nxp,lpuart";
308 reg = <0x44390000 DT_SIZE_K(64)>;
315 compatible = "nxp,mbox-imx-mu";
316 reg = <0x44610000 DT_SIZE_K(4)>;
317 interrupts = <205 0>;
318 #mbox-cells = <1>;
324 arm,num-irq-priority-bits = <4>;