Lines Matching +full:rx +full:- +full:clock +full:- +full:source
4 * SPDX-License-Identifier: Apache-2.0
8 #include "npcx4/npcx4-alts-map.dtsi"
9 /* npcx4 series mapping table between MIWU wui bits and source device */
10 #include "npcx4/npcx4-miwus-wui-map.dtsi"
12 #include "npcx4/npcx4-miwus-int-map.dtsi"
14 #include "npcx4/npcx4-espi-vws-map.dtsi"
15 /* npcx4 series low-voltage io controls mapping table */
16 #include "npcx4/npcx4-lvol-ctrl-map.dtsi"
18 #include "zephyr/dt-bindings/reset/npcx4_reset.h"
26 cpu-power-states = <&suspend_to_idle0>;
29 power-states {
30 suspend_to_idle0: suspend-to-idle0 {
31 compatible = "zephyr,power-state";
32 power-state-name = "suspend-to-idle";
33 substate-id = <0>;
34 min-residency-us = <1000>;
39 def-io-conf-list {
79 compatible = "nuvoton,npcx4", "nuvoton,npcx", "simple-bus";
87 bbram: bb-ram@400af001 {
88 compatible = "nuvoton,npcx-bbram";
91 reg-names = "memory", "status";
96 compatible = "nuvoton,npcx-itim-timer";
99 reg-names = "evt_itim", "sys_itim";
106 compatible = "nuvoton,npcx-uart";
110 /* Index 0: UART1 clock, Index 1: MDMA1 clock */
113 uart-rx = <&wui_cr_sin1>;
118 compatible = "nuvoton,npcx-uart";
123 uart-rx = <&wui_cr_sin2>;
128 compatible = "nuvoton,npcx-uart";
132 /* Index 0: UART3 clock, Index 1: MDMA3 clock */
135 uart-rx = <&wui_cr_sin3>;
140 compatible = "nuvoton,npcx-uart";
144 /* Index 0: UART4 clock, Index 1: MDMA4 clock */
147 uart-rx = <&wui_cr_sin4>;
151 /* Default clock and power settings in npcx4 series */
152 pcc: clock-controller@4000d000 {
153 clock-frequency = <DT_FREQ_M(120)>; /* OFMCLK runs at 120MHz */
154 core-prescaler = <8>; /* CORE_CLK runs at 15MHz */
155 apb1-prescaler = <8>; /* APB1_CLK runs at 15MHz */
156 apb2-prescaler = <8>; /* APB2_CLK runs at 15MHz */
157 apb3-prescaler = <8>; /* APB3_CLK runs at 15MHz */
158 apb4-prescaler = <8>; /* APB4_CLK runs at 15MHz */
159 ram-pd-depth = <8>; /* Valid bit-depth of RAM_PDn reg */
160 pwdwn-ctl-val = <0xfb
170 /* Wake-up input source mapping for GPIOs in npcx4 series */
172 wui-maps = <&wui_io00 &wui_io01 &wui_io02 &wui_io03
175 lvol-maps = <&lvol_io00 &lvol_io01 &lvol_io02 &lvol_io03
180 wui-maps = <&wui_io10 &wui_io11 &wui_io12 &wui_io13
183 lvol-maps = <&lvol_io10 &lvol_io11 &lvol_none &lvol_io13
188 wui-maps = <&wui_io20 &wui_io21 &wui_io22 &wui_io23
191 lvol-maps = <&lvol_io20 &lvol_io21 &lvol_io22 &lvol_io23
196 wui-maps = <&wui_io30 &wui_io31 &wui_none &wui_io33
199 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_io33
204 wui-maps = <&wui_io40 &wui_io41 &wui_io42 &wui_io43
207 lvol-maps = <&lvol_io40 &lvol_io41 &lvol_io42 &lvol_io43
212 wui-maps = <&wui_io50 &wui_io51 &wui_io52 &wui_io53
215 lvol-maps = <&lvol_io50 &lvol_none &lvol_none &lvol_none
220 wui-maps = <&wui_io60 &wui_io61 &wui_io62 &wui_io63
223 lvol-maps = <&lvol_io60 &lvol_io61 &lvol_io62 &lvol_io63
228 wui-maps = <&wui_io70 &wui_none &wui_io72 &wui_io73
231 lvol-maps = <&lvol_io70 &lvol_none &lvol_io72 &lvol_io73
236 wui-maps = <&wui_io80 &wui_io81 &wui_io82 &wui_io83
239 lvol-maps = <&lvol_io80 &lvol_none &lvol_io82 &lvol_io83
244 wui-maps = <&wui_io90 &wui_io91 &wui_io92 &wui_io93
247 lvol-maps = <&lvol_io90 &lvol_io91 &lvol_io92 &lvol_none
252 wui-maps = <&wui_ioa0 &wui_ioa1 &wui_ioa2 &wui_ioa3
255 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_none
260 wui-maps = <&wui_iob0 &wui_iob1 &wui_iob2 &wui_iob3
263 lvol-maps = <&lvol_none &lvol_iob1 &lvol_iob2 &lvol_iob3
268 wui-maps = <&wui_ioc0 &wui_ioc1 &wui_ioc2 &wui_ioc3
271 lvol-maps = <&lvol_ioc0 &lvol_ioc1 &lvol_ioc2 &lvol_ioc3
276 wui-maps = <&wui_iod0 &wui_iod1 &wui_iod2 &wui_iod3
279 lvol-maps = <&lvol_iod0 &lvol_iod1 &lvol_iod2 &lvol_iod3
284 wui-maps = <&wui_ioe0 &wui_ioe1 &wui_ioe2 &wui_ioe3
287 lvol-maps = <&lvol_ioe0 &lvol_ioe1 &lvol_ioe2 &lvol_ioe3
292 wui-maps = <&wui_iof0 &wui_iof1 &wui_iof2 &wui_iof3
295 lvol-maps = <&lvol_iof0 &lvol_iof1 &lvol_iof2 &lvol_iof3
299 /* I2c Controllers - Do not use them as i2c node directly */
301 compatible = "nuvoton,npcx-i2c-ctrl";
305 smb-wui = <&wui_smb0>;
310 compatible = "nuvoton,npcx-i2c-ctrl";
314 smb-wui = <&wui_smb1>;
319 compatible = "nuvoton,npcx-i2c-ctrl";
323 smb-wui = <&wui_smb2>;
328 compatible = "nuvoton,npcx-i2c-ctrl";
332 smb-wui = <&wui_smb3>;
337 compatible = "nuvoton,npcx-i2c-ctrl";
341 smb-wui = <&wui_smb4>;
346 compatible = "nuvoton,npcx-i2c-ctrl";
350 smb-wui = <&wui_smb5>;
355 compatible = "nuvoton,npcx-i2c-ctrl";
359 smb-wui = <&wui_smb6>;
364 compatible = "nuvoton,npcx-i2c-ctrl";
368 smb-wui = <&wui_smb7>;
374 channel-count = <26>;
375 threshold-count = <6>;
380 compatible = "nuvoton,npcx-adc";
381 #io-channel-cells = <1>;
385 vref-mv = <3300>;
386 channel-count = <26>;
387 threshold-count = <6>;
398 compatible = "nuvoton,npcx-fiu-qspi";
399 #address-cells = <1>;
400 #size-cells = <0>;
406 compatible = "nuvoton,npcx-sha";
408 context-buffer-size = <240>;
413 compatible = "nuvoton,npcx-shi-enhanced";
418 buffer-rx-size = <128>;
419 buffer-tx-size = <128>;
420 shi-cs-wui =<&wui_io53>;
424 rx-plsize = <64>;
425 tx-plsize = <64>;
428 compatible = "nuvoton,npcx-espi-taf";
434 rctl: reset-controller@400c3100 {
435 compatible = "nuvoton,npcx-rst";
437 #reset-cells = <1>;
442 compatible = "nuvoton,npcx-i3c";
445 reg-names = "i3c1", "mdma5";
454 /* clk[0]: I3C source clock, clk[1]: timeout reference clock */
456 clock-names = "mclkd", "apb4", "mdma5";
462 #address-cells = <3>;
463 #size-cells = <0>;
464 instance-id = <0x00>;
468 compatible = "nuvoton,npcx-i3c";
471 reg-names = "i3c2", "mdma6";
480 /* clk[0]: I3C source clock, clk[1]: timeout reference clock */
482 clock-names = "mclkd", "apb4", "mdma6";
488 #address-cells = <3>;
489 #size-cells = <0>;
490 instance-id = <0x10>;
494 compatible = "nuvoton,npcx-i3c";
497 reg-names = "i3c1", "mdma7";
506 /* clk[0]: I3C source clock, clk[1]: timeout reference clock */
508 clock-names = "mclkd", "apb4", "mdma7";
514 #address-cells = <3>;
515 #size-cells = <0>;
516 instance-id = <0x20>;
520 soc-if {
522 compatible = "nuvoton,npcx-i2c-port";
523 #address-cells = <1>;
524 #size-cells = <0>;
531 compatible = "nuvoton,npcx-i2c-port";
532 #address-cells = <1>;
533 #size-cells = <0>;
540 soc-id {
541 family-id = <0x23>;
542 chip-id = <0x0a>;
543 revision-reg = <0x0000FFFC 4>;