Lines Matching refs:mss_spi_read
117 static inline uint32_t mss_spi_read(const struct mss_spi_config *cfg, mm_reg_t offset) in mss_spi_read() function
132 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_hw_tfsz_set()
142 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_enable_controller()
151 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_disable_controller()
162 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_enable_ints()
174 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_disable_ints()
201 if (!(mss_spi_read(cfg, MSS_SPI_REG_STATUS) & MSS_SPI_STATUS_RXFIFO_EMPTY)) { in mss_spi_readwr_fifo()
202 rx_raw = mss_spi_read(cfg, MSS_SPI_REG_RX_DATA); in mss_spi_readwr_fifo()
212 if (!(mss_spi_read(cfg, MSS_SPI_REG_STATUS) & MSS_SPI_STATUS_TXFIFO_FULL)) { in mss_spi_readwr_fifo()
227 uint32_t reg = mss_spi_read(cfg, MSS_SPI_REG_SS); in mss_spi_select_slave()
240 uint32_t reg = mss_spi_read(cfg, MSS_SPI_REG_SS); in mss_spi_activate_cs()
248 uint32_t reg = mss_spi_read(cfg, MSS_SPI_REG_SS); in mss_spi_deactivate_cs()
278 uint32_t control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_hw_mode_set()
303 int intfield = mss_spi_read(cfg, MSS_SPI_REG_MIS) & 0xf; in mss_spi_interrupt()
346 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_configure()
430 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_init()