Lines Matching refs:MSS_SPI_REG_CONTROL
22 #define MSS_SPI_REG_CONTROL (0x00) macro
132 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_hw_tfsz_set()
135 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_hw_tfsz_set()
142 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_enable_controller()
144 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_enable_controller()
151 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_disable_controller()
153 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_disable_controller()
162 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_enable_ints()
164 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_enable_ints()
174 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_disable_ints()
176 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_disable_ints()
278 uint32_t control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_hw_mode_set()
293 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_hw_mode_set()
346 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_configure()
357 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, xfer->control); in mss_spi_configure()
430 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_init()
432 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_init()