Lines Matching full:control
109 uint32_t control; member
129 uint32_t control; in mss_spi_hw_tfsz_set() local
132 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_hw_tfsz_set()
133 control &= ~MSS_SPI_CONTROL_CNT_MSK; in mss_spi_hw_tfsz_set()
134 control |= ((len & MSS_SPI_FRAMESUP_LO_BYTES_MSK) << MSS_SPI_CONTROL_CNT_SHF); in mss_spi_hw_tfsz_set()
135 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_hw_tfsz_set()
140 uint32_t control; in mss_spi_enable_controller() local
142 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_enable_controller()
143 control |= MSS_SPI_CONTROL_ENABLE; in mss_spi_enable_controller()
144 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_enable_controller()
149 uint32_t control; in mss_spi_disable_controller() local
151 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_disable_controller()
152 control &= ~MSS_SPI_CONTROL_ENABLE; in mss_spi_disable_controller()
153 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_disable_controller()
158 uint32_t control; in mss_spi_enable_ints() local
162 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_enable_ints()
163 control |= mask; in mss_spi_enable_ints()
164 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_enable_ints()
169 uint32_t control; in mss_spi_disable_ints() local
174 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_disable_ints()
175 control &= ~mask; in mss_spi_disable_ints()
176 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_disable_ints()
278 uint32_t control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_hw_mode_set() local
282 control |= MSS_SPI_CONTROL_SPH; in mss_spi_hw_mode_set()
284 control &= ~MSS_SPI_CONTROL_SPH; in mss_spi_hw_mode_set()
288 control |= MSS_SPI_CONTROL_SPO; in mss_spi_hw_mode_set()
290 control &= ~MSS_SPI_CONTROL_SPO; in mss_spi_hw_mode_set()
293 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_hw_mode_set()
333 uint32_t control; in mss_spi_configure() local
346 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_configure()
357 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, xfer->control); in mss_spi_configure()
427 uint32_t control = 0; in mss_spi_init() local
430 control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL); in mss_spi_init()
431 control &= ~MSS_SPI_CONTROL_RESET; in mss_spi_init()
432 mss_spi_write(cfg, MSS_SPI_REG_CONTROL, control); in mss_spi_init()
436 xfer->control = (MSS_SPI_CONTROL_SPS | MSS_SPI_CONTROL_BIGFIFO | MSS_SPI_CONTROL_MASTER | in mss_spi_init()