Lines Matching +full:standby +full:- +full:gpios
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "mr_canhubk3-pinctrl.dtsi"
14 #include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>
17 model = "NXP MR-CANHUBK3";
25 zephyr,code-partition = &code_partition;
27 zephyr,shell-uart = &lpuart2;
28 zephyr,flash-controller = &mx25l6433f;
42 pwm-0 = &emios0_pwm;
43 pwm-1 = &flexio0_pwm;
44 red-pwm-led = &user_led1_red_pwm;
45 green-pwm-led = &user_led1_green_pwm;
46 blue-pwm-led = &user_led1_blue_pwm;
47 pwm-led0 = &user_led1_blue_pwm;
52 compatible = "gpio-leds";
54 gpios = <&gpioa_h 11 GPIO_ACTIVE_LOW>;
58 gpios = <&gpioe_l 12 GPIO_ACTIVE_LOW>;
62 gpios = <&gpioe_l 14 GPIO_ACTIVE_LOW>;
66 gpios = <&gpioc_h 2 GPIO_ACTIVE_LOW>;
70 gpios = <&gpioe_l 5 GPIO_ACTIVE_LOW>;
74 gpios = <&gpiod_h 4 GPIO_ACTIVE_LOW>;
78 gpios = <&gpiob_h 8 GPIO_ACTIVE_LOW>;
82 gpios = <&gpiob_h 10 GPIO_ACTIVE_LOW>;
86 gpios = <&gpiod_h 15 GPIO_ACTIVE_LOW>;
91 /* gpio-leds and pwm-leds are the same RGB LED and cannot be used at the same time. */
93 compatible = "pwm-leds";
109 compatible = "nxp,qdec-s32";
110 pinctrl-0 = <&qdec_s32>;
111 pinctrl-names = "default";
112 micro-ticks-per-rev = <685440000>;
115 trgmux-io-config =
121 lcu-input-idx =
124 lcu-mux-sel =
127 lcu-output-filter-config =
138 emios-channels = <6 7>;
142 compatible = "gpio-keys";
145 gpios = <&gpiod_l 15 GPIO_ACTIVE_HIGH>;
150 gpios = <&gpioa_h 9 GPIO_ACTIVE_HIGH>;
155 can_phy0: can-phy0 {
156 compatible = "nxp,tja1443", "can-transceiver-gpio";
157 enable-gpios = <&gpioc_h 8 GPIO_ACTIVE_HIGH>;
158 standby-gpios = <&gpioc_h 5 GPIO_ACTIVE_LOW>;
159 max-bitrate = <5000000>;
160 #phy-cells = <0>;
163 can_phy1: can-phy1 {
164 compatible = "nxp,tja1443", "can-transceiver-gpio";
165 enable-gpios = <&gpiod_l 2 GPIO_ACTIVE_HIGH>;
166 standby-gpios = <&gpiod_h 7 GPIO_ACTIVE_LOW>;
167 max-bitrate = <5000000>;
168 #phy-cells = <0>;
171 can_phy2: can-phy2 {
172 compatible = "nxp,tja1463", "can-transceiver-gpio";
173 enable-gpios = <&gpiod_l 4 GPIO_ACTIVE_HIGH>;
174 standby-gpios = <&gpiod_h 6 GPIO_ACTIVE_LOW>;
175 max-bitrate = <8000000>;
176 #phy-cells = <0>;
179 can_phy3: can-phy3 {
180 compatible = "nxp,tja1463", "can-transceiver-gpio";
181 enable-gpios = <&gpiob_l 0 GPIO_ACTIVE_HIGH>;
182 standby-gpios = <&gpiob_l 1 GPIO_ACTIVE_LOW>;
183 max-bitrate = <8000000>;
184 #phy-cells = <0>;
187 can_phy4: can-phy4 {
188 compatible = "nxp,tja1153", "can-transceiver-gpio";
189 enable-gpios = <&gpioc_h 10 GPIO_ACTIVE_HIGH>;
190 standby-gpios = <&gpioc_h 9 GPIO_ACTIVE_LOW>;
191 max-bitrate = <2000000>;
192 #phy-cells = <0>;
195 can_phy5: can-phy5 {
196 compatible = "nxp,tja1153", "can-transceiver-gpio";
197 enable-gpios = <&gpioe_h 1 GPIO_ACTIVE_HIGH>;
198 standby-gpios = <&gpiod_h 14 GPIO_ACTIVE_LOW>;
199 max-bitrate = <2000000>;
200 #phy-cells = <0>;
205 lm-reg;
210 compatible = "fixed-partitions";
211 #address-cells = <1>;
212 #size-cells = <1>;
215 label = "ivt-header";
220 label = "code-partition";
221 reg = <0x00000100 (DT_SIZE_K(4048) - 0x100)>;
261 pinctrl-0 = <&eirq0_default>;
262 pinctrl-names = "default";
267 pinctrl-0 = <&lpuart0_default>;
268 pinctrl-names = "default";
270 dma-names = "tx", "rx";
274 pinctrl-0 = <&lpuart1_default>;
275 pinctrl-names = "default";
277 dma-names = "tx", "rx";
281 pinctrl-0 = <&lpuart2_default>;
282 pinctrl-names = "default";
283 current-speed = <115200>;
285 dma-names = "tx", "rx";
290 pinctrl-0 = <&lpuart9_default>;
291 pinctrl-names = "default";
298 dma-names = "tx", "rx";
302 pinctrl-0 = <&lpuart10_default>;
303 pinctrl-names = "default";
310 dma-names = "tx", "rx";
314 pinctrl-0 = <&lpuart13_default>;
315 pinctrl-names = "default";
317 dma-names = "tx", "rx";
321 pinctrl-0 = <&lpuart14_default>;
322 pinctrl-names = "default";
324 dma-names = "tx", "rx";
328 pinctrl-0 = <&qspi0_default>;
329 pinctrl-names = "default";
330 data-rate = "SDR";
331 a-rx-clock-source = "LOOPBACK";
332 a-dll-mode = "BYPASSED";
333 ahb-buffers-masters = <0 1 2 3>;
334 ahb-buffers-sizes = <0 0 0 256>;
335 ahb-buffers-all-masters;
339 compatible = "nxp,s32-qspi-nor";
342 jedec-id = [c2 20 17];
343 quad-enable-requirements = "S1B6";
344 readoc = "1-4-4";
345 writeoc = "1-4-4";
346 has-32k-erase;
350 compatible = "fixed-partitions";
351 #address-cells = <1>;
352 #size-cells = <1>;
363 pinctrl-0 = <&flexcan0_default>;
364 pinctrl-names = "default";
370 pinctrl-0 = <&flexcan1_default>;
371 pinctrl-names = "default";
376 pinctrl-0 = <&flexcan2_default>;
377 pinctrl-names = "default";
382 pinctrl-0 = <&flexcan3_default>;
383 pinctrl-names = "default";
388 pinctrl-0 = <&flexcan4_default>;
389 pinctrl-names = "default";
394 pinctrl-0 = <&flexcan5_default>;
395 pinctrl-names = "default";
400 pinctrl-0 = <&lpi2c0_default>;
401 pinctrl-names = "default";
402 clock-frequency = <I2C_BITRATE_STANDARD>;
410 segment-offset = <0>;
411 page-offset = <0>;
412 display-offset = <0>;
413 multiplex-ratio = <31>;
414 segment-remap;
415 com-invdir;
416 com-sequential;
422 pinctrl-0 = <&lpi2c1_default>;
423 pinctrl-names = "default";
424 clock-frequency = <I2C_BITRATE_STANDARD>;
428 pinctrl-0 = <&lpspi1_default>;
429 pinctrl-names = "default";
430 data-pin-config = "sdo-in,sdi-out";
434 pinctrl-0 = <&lpspi2_default>;
435 pinctrl-names = "default";
436 data-pin-config = "sdo-in,sdi-out";
440 pinctrl-0 = <&lpspi3_default>;
441 pinctrl-names = "default";
442 data-pin-config = "sdo-in,sdi-out";
446 compatible = "nxp,fs26-wdog";
448 spi-max-frequency = <DT_FREQ_M(5)>;
450 int-gpios = <&gpioa_h 2 GPIO_ACTIVE_LOW>;
456 pinctrl-0 = <&lpspi4_default>;
457 pinctrl-names = "default";
458 data-pin-config = "sdo-in,sdi-out";
462 pinctrl-0 = <&lpspi5_default>;
463 pinctrl-names = "default";
464 data-pin-config = "sdo-in,sdi-out";
468 pinctrl-0 = <&emac0_default>;
469 pinctrl-names = "default";
470 phy-connection-type = "rmii";
471 local-mac-address = [02 04 9f aa bb cc];
472 phy-handle = <&phy>;
477 pinctrl-0 = <&mdio0_default>;
478 pinctrl-names = "default";
481 phy: ethernet-phy@12 {
485 int-gpios = <&gpiod_l 5 GPIO_ACTIVE_LOW>;
486 master-slave = "slave";
491 clock-divider = <200>;
497 * default period is 1000 cycles <-> 20ms.
508 pinctrl-0 = <&emios0_default>;
509 pinctrl-names = "default";
512 /* Default clock for internal counter for PWM channel 0-7 is 100Khz */
515 pwm-mode = "OPWFMB";
517 duty-cycle = <0>;
524 pwm-mode = "OPWFMB";
526 duty-cycle = <0>;
533 pwm-mode = "OPWFMB";
535 duty-cycle = <0>;
542 pwm-mode = "OPWFMB";
544 duty-cycle = <0>;
551 pwm-mode = "OPWFMB";
553 duty-cycle = <0>;
560 pwm-mode = "OPWFMB";
562 duty-cycle = <0>;
569 master-bus = <&emios0_bus_a>;
570 duty-cycle = <0>;
571 pwm-mode = "OPWMB";
578 clock-divider = <200>;
584 * default period is 1000 cycles <-> 20ms.
602 pinctrl-0 = <&emios1_default>;
603 pinctrl-names = "default";
608 master-bus = <&emios1_bus_a>;
609 duty-cycle = <0>;
610 pwm-mode = "OPWMB";
616 master-bus = <&emios1_bus_f>;
617 duty-cycle = <0>;
618 pwm-mode = "OPWMB";
628 pinctrl-0 = <&flexio0_pwm_default>;
629 pinctrl-names = "default";
633 pin-id = <19>;
638 pin-id = <11>;