/* * Copyright 2023 NXP * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include #include #include #include #include #include "mr_canhubk3-pinctrl.dtsi" #include / { model = "NXP MR-CANHUBK3"; compatible = "nxp,mr_canhubk3"; chosen { zephyr,sram = &sram0_1; zephyr,flash = &flash0; zephyr,itcm = &itcm; zephyr,dtcm = &dtcm; zephyr,code-partition = &code_partition; zephyr,console = &lpuart2; zephyr,shell-uart = &lpuart2; zephyr,flash-controller = &mx25l6433f; zephyr,canbus = &flexcan0; zephyr,display = &ssd1306; }; aliases { dma0 = &edma0; led0 = &user_led1_red; led1 = &user_led1_green; led2 = &user_led1_blue; sw0 = &user_button_1; sw1 = &user_button_2; watchdog0 = &swt0; /* For pwm test suites */ pwm-0 = &emios0_pwm; pwm-1 = &flexio0_pwm; red-pwm-led = &user_led1_red_pwm; green-pwm-led = &user_led1_green_pwm; blue-pwm-led = &user_led1_blue_pwm; pwm-led0 = &user_led1_blue_pwm; qdec0 = &qdec0; }; leds { compatible = "gpio-leds"; user_led1_green: user_led1_green { gpios = <&gpioa_h 11 GPIO_ACTIVE_LOW>; label = "User RGB LED1 GREEN"; }; user_led1_blue: user_led1_blue { gpios = <&gpioe_l 12 GPIO_ACTIVE_LOW>; label = "User RGB LED1 BLUE"; }; user_led1_red: user_led1_red { gpios = <&gpioe_l 14 GPIO_ACTIVE_LOW>; label = "User RGB LED1 RED"; }; can_led0: can_led0 { gpios = <&gpioc_h 2 GPIO_ACTIVE_LOW>; label = "CAN LED0"; }; can_led1: can_led1 { gpios = <&gpioe_l 5 GPIO_ACTIVE_LOW>; label = "CAN LED1"; }; can_led2: can_led2 { gpios = <&gpiod_h 4 GPIO_ACTIVE_LOW>; label = "CAN LED2"; }; can_led3: can_led3 { gpios = <&gpiob_h 8 GPIO_ACTIVE_LOW>; label = "CAN LED3"; }; can_led4: can_led4 { gpios = <&gpiob_h 10 GPIO_ACTIVE_LOW>; label = "CAN LED4"; }; can_led5: can_led5 { gpios = <&gpiod_h 15 GPIO_ACTIVE_LOW>; label = "CAN LED5"; }; }; /* gpio-leds and pwm-leds are the same RGB LED and cannot be used at the same time. */ pwmleds { compatible = "pwm-leds"; user_led1_blue_pwm: user_led1_blue { pwms = <&emios1_pwm 5 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; user_led1_green_pwm: user_led1_green { pwms = <&emios1_pwm 10 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; user_led1_red_pwm: user_led1_red { pwms = <&emios0_pwm 19 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; }; qdec0: qdec0 { compatible = "nxp,qdec-s32"; pinctrl-0 = <&qdec_s32>; pinctrl-names = "default"; micro-ticks-per-rev = <685440000>; status = "okay"; trgmux = <&trgmux>; trgmux-io-config = <0 TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH6 TRGMUX_IP_INPUT_LCU1_LC0_OUT_I2>, <1 TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH7 TRGMUX_IP_INPUT_LCU1_LC0_OUT_I3>, <2 TRGMUX_IP_OUTPUT_LCU1_0_INP_I0 TRGMUX_IP_INPUT_SIUL2_IN2>, <3 TRGMUX_IP_OUTPUT_LCU1_0_INP_I1 TRGMUX_IP_INPUT_SIUL2_IN3>; lcu = <&lcu1>; lcu-input-idx = ; lcu-mux-sel = ; lcu-output-filter-config = /* LCU Out HW ID, Rise Filter, Fall Filter */ <0 5 5>, /* LCU O0 */ <1 5 5>, /* LCU O1 */ <2 2 2>, /* LCU O2 */ <3 2 2>; /* LCU O3 */ emios = <&emios0>; /* * eMios channel numbers for qdec should be beyond the channel numbers * used by the emios pwm */ emios-channels = <6 7>; }; gpio_keys { compatible = "gpio-keys"; user_button_1: button_0 { label = "User SW1"; gpios = <&gpiod_l 15 GPIO_ACTIVE_HIGH>; zephyr,code = ; }; user_button_2: button_1 { label = "User SW2"; gpios = <&gpioa_h 9 GPIO_ACTIVE_HIGH>; zephyr,code = ; }; }; can_phy0: can-phy0 { compatible = "nxp,tja1443", "can-transceiver-gpio"; enable-gpios = <&gpioc_h 8 GPIO_ACTIVE_HIGH>; standby-gpios = <&gpioc_h 5 GPIO_ACTIVE_LOW>; max-bitrate = <5000000>; #phy-cells = <0>; }; can_phy1: can-phy1 { compatible = "nxp,tja1443", "can-transceiver-gpio"; enable-gpios = <&gpiod_l 2 GPIO_ACTIVE_HIGH>; standby-gpios = <&gpiod_h 7 GPIO_ACTIVE_LOW>; max-bitrate = <5000000>; #phy-cells = <0>; }; can_phy2: can-phy2 { compatible = "nxp,tja1463", "can-transceiver-gpio"; enable-gpios = <&gpiod_l 4 GPIO_ACTIVE_HIGH>; standby-gpios = <&gpiod_h 6 GPIO_ACTIVE_LOW>; max-bitrate = <8000000>; #phy-cells = <0>; }; can_phy3: can-phy3 { compatible = "nxp,tja1463", "can-transceiver-gpio"; enable-gpios = <&gpiob_l 0 GPIO_ACTIVE_HIGH>; standby-gpios = <&gpiob_l 1 GPIO_ACTIVE_LOW>; max-bitrate = <8000000>; #phy-cells = <0>; }; can_phy4: can-phy4 { compatible = "nxp,tja1153", "can-transceiver-gpio"; enable-gpios = <&gpioc_h 10 GPIO_ACTIVE_HIGH>; standby-gpios = <&gpioc_h 9 GPIO_ACTIVE_LOW>; max-bitrate = <2000000>; #phy-cells = <0>; }; can_phy5: can-phy5 { compatible = "nxp,tja1153", "can-transceiver-gpio"; enable-gpios = <&gpioe_h 1 GPIO_ACTIVE_HIGH>; standby-gpios = <&gpiod_h 14 GPIO_ACTIVE_LOW>; max-bitrate = <2000000>; #phy-cells = <0>; }; }; &pmc { lm-reg; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; ivt_header: partition@0 { label = "ivt-header"; reg = <0x00000000 0x100>; }; code_partition: partition@100 { label = "code-partition"; reg = <0x00000100 (DT_SIZE_K(4048) - 0x100)>; }; }; }; &gpioa_h { status = "okay"; }; &gpioe_l { status = "okay"; }; /* Enable gpio to control the CAN transceivers and LEDs */ &gpiob_h { status = "okay"; }; &gpioc_h { status = "okay"; }; &gpiod_l { status = "okay"; }; &gpiod_h { status = "okay"; }; &gpiob_l { status = "okay"; }; &gpioe_h { status = "okay"; }; &eirq0 { pinctrl-0 = <&eirq0_default>; pinctrl-names = "default"; status = "okay"; }; &lpuart0 { pinctrl-0 = <&lpuart0_default>; pinctrl-names = "default"; dmas = <&edma0 0 37>, <&edma0 1 38>; dma-names = "tx", "rx"; }; &lpuart1 { pinctrl-0 = <&lpuart1_default>; pinctrl-names = "default"; dmas = <&edma0 2 39>, <&edma0 3 40>; dma-names = "tx", "rx"; }; &lpuart2 { pinctrl-0 = <&lpuart2_default>; pinctrl-names = "default"; current-speed = <115200>; dmas = <&edma0 16 38>, <&edma0 17 39>; dma-names = "tx", "rx"; status = "okay"; }; &lpuart9 { pinctrl-0 = <&lpuart9_default>; pinctrl-names = "default"; /* * LPUART 1 and 9 share the same DMA source for TX * and RX, using UART async API for both instances * should be careful. */ dmas = <&edma0 4 39>, <&edma0 5 40>; dma-names = "tx", "rx"; }; &lpuart10 { pinctrl-0 = <&lpuart10_default>; pinctrl-names = "default"; /* * LPUART 2 and 10 share the same DMA source for TX * and RX, using UART async API for both instances * should be careful. */ dmas = <&edma0 18 38>, <&edma0 19 39>; dma-names = "tx", "rx"; }; &lpuart13 { pinctrl-0 = <&lpuart13_default>; pinctrl-names = "default"; dmas = <&edma0 20 44>, <&edma0 21 45>; dma-names = "tx", "rx"; }; &lpuart14 { pinctrl-0 = <&lpuart14_default>; pinctrl-names = "default"; dmas = <&edma0 22 46>, <&edma0 23 47>; dma-names = "tx", "rx"; }; &qspi0 { pinctrl-0 = <&qspi0_default>; pinctrl-names = "default"; data-rate = "SDR"; a-rx-clock-source = "LOOPBACK"; a-dll-mode = "BYPASSED"; ahb-buffers-masters = <0 1 2 3>; ahb-buffers-sizes = <0 0 0 256>; ahb-buffers-all-masters; status = "okay"; mx25l6433f: mx25l6433f@0 { compatible = "nxp,s32-qspi-nor"; reg = <0>; size = ; jedec-id = [c2 20 17]; quad-enable-requirements = "S1B6"; readoc = "1-4-4"; writeoc = "1-4-4"; has-32k-erase; status = "okay"; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; storage_partition: partition@0 { label = "storage"; reg = <0x0 0x100000>; }; }; }; }; &flexcan0 { pinctrl-0 = <&flexcan0_default>; pinctrl-names = "default"; phys = <&can_phy0>; status = "okay"; }; &flexcan1 { pinctrl-0 = <&flexcan1_default>; pinctrl-names = "default"; phys = <&can_phy1>; }; &flexcan2 { pinctrl-0 = <&flexcan2_default>; pinctrl-names = "default"; phys = <&can_phy2>; }; &flexcan3 { pinctrl-0 = <&flexcan3_default>; pinctrl-names = "default"; phys = <&can_phy3>; }; &flexcan4 { pinctrl-0 = <&flexcan4_default>; pinctrl-names = "default"; phys = <&can_phy4>; }; &flexcan5 { pinctrl-0 = <&flexcan5_default>; pinctrl-names = "default"; phys = <&can_phy5>; }; &lpi2c0 { pinctrl-0 = <&lpi2c0_default>; pinctrl-names = "default"; clock-frequency = ; status = "okay"; ssd1306: ssd1306@3c { compatible = "solomon,ssd1306fb"; reg = <0x3c>; width = <128>; height = <32>; segment-offset = <0>; page-offset = <0>; display-offset = <0>; multiplex-ratio = <31>; segment-remap; com-invdir; com-sequential; prechargep = <0x22>; }; }; &lpi2c1 { pinctrl-0 = <&lpi2c1_default>; pinctrl-names = "default"; clock-frequency = ; }; &lpspi1 { pinctrl-0 = <&lpspi1_default>; pinctrl-names = "default"; data-pin-config = "sdo-in,sdi-out"; }; &lpspi2 { pinctrl-0 = <&lpspi2_default>; pinctrl-names = "default"; data-pin-config = "sdo-in,sdi-out"; }; &lpspi3 { pinctrl-0 = <&lpspi3_default>; pinctrl-names = "default"; data-pin-config = "sdo-in,sdi-out"; status = "okay"; fs26_wdt: watchdog@0 { compatible = "nxp,fs26-wdog"; reg = <0>; spi-max-frequency = ; type = "challenger"; int-gpios = <&gpioa_h 2 GPIO_ACTIVE_LOW>; status = "okay"; }; }; &lpspi4 { pinctrl-0 = <&lpspi4_default>; pinctrl-names = "default"; data-pin-config = "sdo-in,sdi-out"; }; &lpspi5 { pinctrl-0 = <&lpspi5_default>; pinctrl-names = "default"; data-pin-config = "sdo-in,sdi-out"; }; &emac0 { pinctrl-0 = <&emac0_default>; pinctrl-names = "default"; phy-connection-type = "rmii"; local-mac-address = [02 04 9f aa bb cc]; phy-handle = <&phy>; status = "okay"; }; &mdio0 { pinctrl-0 = <&mdio0_default>; pinctrl-names = "default"; status = "okay"; phy: ethernet-phy@12 { compatible = "nxp,tja1103"; status = "okay"; reg = <0x12>; int-gpios = <&gpiod_l 5 GPIO_ACTIVE_LOW>; master-slave = "slave"; }; }; &emios0 { clock-divider = <200>; status = "okay"; master_bus { /* * Timebase for PWM led, setting clock 50KHz for internal counter, * default period is 1000 cycles <-> 20ms. */ emios0_bus_a { mode = "MCB_UP_COUNTER"; prescaler = <16>; period = <1000>; status = "okay"; }; }; emios0_pwm: pwm { pinctrl-0 = <&emios0_default>; pinctrl-names = "default"; status = "okay"; /* Default clock for internal counter for PWM channel 0-7 is 100Khz */ pwm_0 { channel = <0>; pwm-mode = "OPWFMB"; period = <65535>; duty-cycle = <0>; prescaler = <8>; polarity = "ACTIVE_HIGH"; }; pwm_1 { channel = <1>; pwm-mode = "OPWFMB"; period = <65535>; duty-cycle = <0>; prescaler = <8>; polarity = "ACTIVE_HIGH"; }; pwm_2 { channel = <2>; pwm-mode = "OPWFMB"; period = <65535>; duty-cycle = <0>; prescaler = <8>; polarity = "ACTIVE_HIGH"; }; pwm_3 { channel = <3>; pwm-mode = "OPWFMB"; period = <65535>; duty-cycle = <0>; prescaler = <8>; polarity = "ACTIVE_HIGH"; }; pwm_4 { channel = <4>; pwm-mode = "OPWFMB"; period = <65535>; duty-cycle = <0>; prescaler = <8>; polarity = "ACTIVE_HIGH"; }; pwm_5 { channel = <5>; pwm-mode = "OPWFMB"; period = <65535>; duty-cycle = <0>; prescaler = <8>; polarity = "ACTIVE_HIGH"; }; rgb_red { channel = <19>; master-bus = <&emios0_bus_a>; duty-cycle = <0>; pwm-mode = "OPWMB"; polarity = "ACTIVE_LOW"; }; }; }; &emios1 { clock-divider = <200>; status = "okay"; master_bus { /* * Timebase for PWM led, setting clock 50KHz for internal counter, * default period is 1000 cycles <-> 20ms. */ emios1_bus_a { prescaler = <16>; mode = "MCB_UP_COUNTER"; period = <1000>; status = "okay"; }; emios1_bus_f { prescaler = <16>; mode = "MCB_UP_COUNTER"; period = <1000>; status = "okay"; }; }; emios1_pwm: pwm { pinctrl-0 = <&emios1_default>; pinctrl-names = "default"; status = "okay"; rgb_green { channel = <10>; master-bus = <&emios1_bus_a>; duty-cycle = <0>; pwm-mode = "OPWMB"; polarity = "ACTIVE_LOW"; }; rgb_blue { channel = <5>; master-bus = <&emios1_bus_f>; duty-cycle = <0>; pwm-mode = "OPWMB"; polarity = "ACTIVE_LOW"; }; }; }; &flexio0 { status = "okay"; flexio0_pwm: flexio0_pwm { pinctrl-0 = <&flexio0_pwm_default>; pinctrl-names = "default"; status = "okay"; pwm_0 { pin-id = <19>; prescaler = <1>; }; pwm_1 { pin-id = <11>; prescaler = <1>; }; }; }; &lcu1 { status = "okay"; }; &trgmux { status = "okay"; }; &edma0 { status = "okay"; };