Lines Matching +full:qdec +full:- +full:s32
2 * Copyright 2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "mr_canhubk3-pinctrl.dtsi"
14 #include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>
17 model = "NXP MR-CANHUBK3";
25 zephyr,code-partition = &code_partition;
27 zephyr,shell-uart = &lpuart2;
28 zephyr,flash-controller = &mx25l6433f;
42 pwm-0 = &emios0_pwm;
43 pwm-1 = &flexio0_pwm;
44 red-pwm-led = &user_led1_red_pwm;
45 green-pwm-led = &user_led1_green_pwm;
46 blue-pwm-led = &user_led1_blue_pwm;
47 pwm-led0 = &user_led1_blue_pwm;
52 compatible = "gpio-leds";
91 /* gpio-leds and pwm-leds are the same RGB LED and cannot be used at the same time. */
93 compatible = "pwm-leds";
109 compatible = "nxp,qdec-s32";
110 pinctrl-0 = <&qdec_s32>;
111 pinctrl-names = "default";
112 micro-ticks-per-rev = <685440000>;
115 trgmux-io-config =
121 lcu-input-idx =
124 lcu-mux-sel =
127 lcu-output-filter-config =
135 * eMios channel numbers for qdec should be beyond the channel numbers
138 emios-channels = <6 7>;
142 compatible = "gpio-keys";
155 can_phy0: can-phy0 {
156 compatible = "nxp,tja1443", "can-transceiver-gpio";
157 enable-gpios = <&gpioc_h 8 GPIO_ACTIVE_HIGH>;
158 standby-gpios = <&gpioc_h 5 GPIO_ACTIVE_LOW>;
159 max-bitrate = <5000000>;
160 #phy-cells = <0>;
163 can_phy1: can-phy1 {
164 compatible = "nxp,tja1443", "can-transceiver-gpio";
165 enable-gpios = <&gpiod_l 2 GPIO_ACTIVE_HIGH>;
166 standby-gpios = <&gpiod_h 7 GPIO_ACTIVE_LOW>;
167 max-bitrate = <5000000>;
168 #phy-cells = <0>;
171 can_phy2: can-phy2 {
172 compatible = "nxp,tja1463", "can-transceiver-gpio";
173 enable-gpios = <&gpiod_l 4 GPIO_ACTIVE_HIGH>;
174 standby-gpios = <&gpiod_h 6 GPIO_ACTIVE_LOW>;
175 max-bitrate = <8000000>;
176 #phy-cells = <0>;
179 can_phy3: can-phy3 {
180 compatible = "nxp,tja1463", "can-transceiver-gpio";
181 enable-gpios = <&gpiob_l 0 GPIO_ACTIVE_HIGH>;
182 standby-gpios = <&gpiob_l 1 GPIO_ACTIVE_LOW>;
183 max-bitrate = <8000000>;
184 #phy-cells = <0>;
187 can_phy4: can-phy4 {
188 compatible = "nxp,tja1153", "can-transceiver-gpio";
189 enable-gpios = <&gpioc_h 10 GPIO_ACTIVE_HIGH>;
190 standby-gpios = <&gpioc_h 9 GPIO_ACTIVE_LOW>;
191 max-bitrate = <2000000>;
192 #phy-cells = <0>;
195 can_phy5: can-phy5 {
196 compatible = "nxp,tja1153", "can-transceiver-gpio";
197 enable-gpios = <&gpioe_h 1 GPIO_ACTIVE_HIGH>;
198 standby-gpios = <&gpiod_h 14 GPIO_ACTIVE_LOW>;
199 max-bitrate = <2000000>;
200 #phy-cells = <0>;
205 lm-reg;
210 compatible = "fixed-partitions";
211 #address-cells = <1>;
212 #size-cells = <1>;
215 label = "ivt-header";
220 label = "code-partition";
221 reg = <0x00000100 (DT_SIZE_K(4048) - 0x100)>;
261 pinctrl-0 = <&eirq0_default>;
262 pinctrl-names = "default";
267 pinctrl-0 = <&lpuart0_default>;
268 pinctrl-names = "default";
270 dma-names = "tx", "rx";
274 pinctrl-0 = <&lpuart1_default>;
275 pinctrl-names = "default";
277 dma-names = "tx", "rx";
281 pinctrl-0 = <&lpuart2_default>;
282 pinctrl-names = "default";
283 current-speed = <115200>;
285 dma-names = "tx", "rx";
290 pinctrl-0 = <&lpuart9_default>;
291 pinctrl-names = "default";
298 dma-names = "tx", "rx";
302 pinctrl-0 = <&lpuart10_default>;
303 pinctrl-names = "default";
310 dma-names = "tx", "rx";
314 pinctrl-0 = <&lpuart13_default>;
315 pinctrl-names = "default";
317 dma-names = "tx", "rx";
321 pinctrl-0 = <&lpuart14_default>;
322 pinctrl-names = "default";
324 dma-names = "tx", "rx";
328 pinctrl-0 = <&qspi0_default>;
329 pinctrl-names = "default";
330 data-rate = "SDR";
331 a-rx-clock-source = "LOOPBACK";
332 a-dll-mode = "BYPASSED";
333 ahb-buffers-masters = <0 1 2 3>;
334 ahb-buffers-sizes = <0 0 0 256>;
335 ahb-buffers-all-masters;
339 compatible = "nxp,s32-qspi-nor";
342 jedec-id = [c2 20 17];
343 quad-enable-requirements = "S1B6";
344 readoc = "1-4-4";
345 writeoc = "1-4-4";
346 has-32k-erase;
347 max-program-buffer-size = <256>;
348 write-block-size = <1>;
352 compatible = "fixed-partitions";
353 #address-cells = <1>;
354 #size-cells = <1>;
365 pinctrl-0 = <&flexcan0_default>;
366 pinctrl-names = "default";
372 pinctrl-0 = <&flexcan1_default>;
373 pinctrl-names = "default";
378 pinctrl-0 = <&flexcan2_default>;
379 pinctrl-names = "default";
384 pinctrl-0 = <&flexcan3_default>;
385 pinctrl-names = "default";
390 pinctrl-0 = <&flexcan4_default>;
391 pinctrl-names = "default";
396 pinctrl-0 = <&flexcan5_default>;
397 pinctrl-names = "default";
402 pinctrl-0 = <&lpi2c0_default>;
403 pinctrl-names = "default";
404 clock-frequency = <I2C_BITRATE_STANDARD>;
412 segment-offset = <0>;
413 page-offset = <0>;
414 display-offset = <0>;
415 multiplex-ratio = <31>;
416 segment-remap;
417 com-invdir;
418 com-sequential;
424 pinctrl-0 = <&lpi2c1_default>;
425 pinctrl-names = "default";
426 clock-frequency = <I2C_BITRATE_STANDARD>;
430 pinctrl-0 = <&lpspi1_default>;
431 pinctrl-names = "default";
432 data-pin-config = "sdo-in,sdi-out";
436 pinctrl-0 = <&lpspi2_default>;
437 pinctrl-names = "default";
438 data-pin-config = "sdo-in,sdi-out";
442 pinctrl-0 = <&lpspi3_default>;
443 pinctrl-names = "default";
444 data-pin-config = "sdo-in,sdi-out";
448 compatible = "nxp,fs26-wdog";
450 spi-max-frequency = <DT_FREQ_M(5)>;
452 int-gpios = <&gpioa_h 2 GPIO_ACTIVE_LOW>;
458 pinctrl-0 = <&lpspi4_default>;
459 pinctrl-names = "default";
460 data-pin-config = "sdo-in,sdi-out";
464 pinctrl-0 = <&lpspi5_default>;
465 pinctrl-names = "default";
466 data-pin-config = "sdo-in,sdi-out";
470 pinctrl-0 = <&emac0_default>;
471 pinctrl-names = "default";
472 phy-connection-type = "rmii";
473 local-mac-address = [02 04 9f aa bb cc];
474 phy-handle = <&phy>;
479 pinctrl-0 = <&mdio0_default>;
480 pinctrl-names = "default";
483 phy: ethernet-phy@12 {
487 int-gpios = <&gpiod_l 5 GPIO_ACTIVE_LOW>;
488 master-slave = "slave";
493 clock-divider = <200>;
499 * default period is 1000 cycles <-> 20ms.
509 pinctrl-0 = <&emios0_default>;
510 pinctrl-names = "default";
513 /* Default clock for internal counter for PWM channel 0-7 is 100Khz */
516 pwm-mode = "OPWFMB";
522 pwm-mode = "OPWFMB";
528 pwm-mode = "OPWFMB";
534 pwm-mode = "OPWFMB";
540 pwm-mode = "OPWFMB";
546 pwm-mode = "OPWFMB";
552 master-bus = <&emios0_bus_a>;
553 pwm-mode = "OPWMB";
559 clock-divider = <200>;
565 * default period is 1000 cycles <-> 20ms.
581 pinctrl-0 = <&emios1_default>;
582 pinctrl-names = "default";
587 master-bus = <&emios1_bus_a>;
588 pwm-mode = "OPWMB";
593 master-bus = <&emios1_bus_f>;
594 pwm-mode = "OPWMB";
603 pinctrl-0 = <&flexio0_pwm_default>;
604 pinctrl-names = "default";
608 pin-id = <19>;
613 pin-id = <11>;