1;/***************************************************************************
2; * Copyright (c) 2024 Microsoft Corporation
3; *
4; * This program and the accompanying materials are made available under the
5; * terms of the MIT License which is available at
6; * https://opensource.org/licenses/MIT.
7; *
8; * SPDX-License-Identifier: MIT
9; **************************************************************************/
10;
11;
12;/**************************************************************************/
13;/**************************************************************************/
14;/**                                                                       */
15;/** ThreadX Component                                                     */
16;/**                                                                       */
17;/**   Thread                                                              */
18;/**                                                                       */
19;/**************************************************************************/
20;/**************************************************************************/
21;
22;#define TX_SOURCE_CODE
23;
24;
25;/* Include necessary system files.  */
26;
27;#include "tx_api.h"
28;#include "tx_thread.h"
29;
30;
31    IF :DEF:TX_ENABLE_FIQ_SUPPORT
32INT_MASK        EQU         0xC0                ; Interrupt bit mask
33    ELSE
34INT_MASK        EQU         0x80                ; Interrupt bit mask
35    ENDIF
36;
37;
38        AREA ||.text||, CODE, READONLY
39;/**************************************************************************/
40;/*                                                                        */
41;/*  FUNCTION                                               RELEASE        */
42;/*                                                                        */
43;/*    _tx_thread_interrupt_control                        ARM11/AC5       */
44;/*                                                            6.1         */
45;/*  AUTHOR                                                                */
46;/*                                                                        */
47;/*    William E. Lamie, Microsoft Corporation                             */
48;/*                                                                        */
49;/*  DESCRIPTION                                                           */
50;/*                                                                        */
51;/*    This function is responsible for changing the interrupt lockout     */
52;/*    posture of the system.                                              */
53;/*                                                                        */
54;/*  INPUT                                                                 */
55;/*                                                                        */
56;/*    new_posture                           New interrupt lockout posture */
57;/*                                                                        */
58;/*  OUTPUT                                                                */
59;/*                                                                        */
60;/*    old_posture                           Old interrupt lockout posture */
61;/*                                                                        */
62;/*  CALLS                                                                 */
63;/*                                                                        */
64;/*    None                                                                */
65;/*                                                                        */
66;/*  CALLED BY                                                             */
67;/*                                                                        */
68;/*    Application Code                                                    */
69;/*                                                                        */
70;/*  RELEASE HISTORY                                                       */
71;/*                                                                        */
72;/*    DATE              NAME                      DESCRIPTION             */
73;/*                                                                        */
74;/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
75;/*                                                                        */
76;/**************************************************************************/
77;UINT   _tx_thread_interrupt_control(UINT new_posture)
78;{
79    EXPORT  _tx_thread_interrupt_control
80_tx_thread_interrupt_control
81;
82;    /* Pickup current interrupt lockout posture.  */
83;
84    MRS     r3, CPSR                            ; Pickup current CPSR
85    BIC     r1, r3, #INT_MASK                   ; Clear interrupt lockout bits
86    ORR     r1, r1, r0                          ; Or-in new interrupt lockout bits
87;
88;    /* Apply the new interrupt posture.  */
89;
90    MSR     CPSR_cxsf, r1                       ; Setup new CPSR
91    AND     r0, r3, #INT_MASK                   ; Return previous interrupt mask
92    IF  {INTER} = {TRUE}
93    BX      lr                                  ; Return to caller
94    ELSE
95    MOV     pc, lr                              ; Return to caller
96    ENDIF
97;
98;}
99;
100    END
101
102