;/*************************************************************************** ; * Copyright (c) 2024 Microsoft Corporation ; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. ; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ ;/** */ ;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ ; ;#define TX_SOURCE_CODE ; ; ;/* Include necessary system files. */ ; ;#include "tx_api.h" ;#include "tx_thread.h" ; ; IF :DEF:TX_ENABLE_FIQ_SUPPORT INT_MASK EQU 0xC0 ; Interrupt bit mask ELSE INT_MASK EQU 0x80 ; Interrupt bit mask ENDIF ; ; AREA ||.text||, CODE, READONLY ;/**************************************************************************/ ;/* */ ;/* FUNCTION RELEASE */ ;/* */ ;/* _tx_thread_interrupt_control ARM11/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ ;/* */ ;/* This function is responsible for changing the interrupt lockout */ ;/* posture of the system. */ ;/* */ ;/* INPUT */ ;/* */ ;/* new_posture New interrupt lockout posture */ ;/* */ ;/* OUTPUT */ ;/* */ ;/* old_posture Old interrupt lockout posture */ ;/* */ ;/* CALLS */ ;/* */ ;/* None */ ;/* */ ;/* CALLED BY */ ;/* */ ;/* Application Code */ ;/* */ ;/* RELEASE HISTORY */ ;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ ;/* */ ;/**************************************************************************/ ;UINT _tx_thread_interrupt_control(UINT new_posture) ;{ EXPORT _tx_thread_interrupt_control _tx_thread_interrupt_control ; ; /* Pickup current interrupt lockout posture. */ ; MRS r3, CPSR ; Pickup current CPSR BIC r1, r3, #INT_MASK ; Clear interrupt lockout bits ORR r1, r1, r0 ; Or-in new interrupt lockout bits ; ; /* Apply the new interrupt posture. */ ; MSR CPSR_cxsf, r1 ; Setup new CPSR AND r0, r3, #INT_MASK ; Return previous interrupt mask IF {INTER} = {TRUE} BX lr ; Return to caller ELSE MOV pc, lr ; Return to caller ENDIF ; ;} ; END