Searched refs:boot (Results 1 – 25 of 29) sorted by relevance
12
107 CBZ x0, boot // If core 0, run the primary init code111 boot: label
28 .boot : > .
60 // These special symbols mark the bounds of RAM and ROM images of boot code.
67 // These special symbols mark the bounds of RAM and ROM images of boot code.
6 * Start of boot code for 24K Family of Cores47 #include <boot.h>58 // Although not necessary, register initialization may be useful during boot,
6 * Start of boot code for interAptiv Family of Cores48 #include <boot.h>67 // RAMHACK: Removed boot exception handlers.72 // RAMHACK: Removed boot exception handlers.192 la a2, set_gpr_boot_values // Fill register file boot info.308 la a2, release_mp // Release other cores to execute this boot code.318 la a2, init_vpe1 // Set up MT ASE vpe1 to execute this boot code also.
6 * Release other processors so they can boot48 #include <boot.h>
47 #include <boot.h>114 // Clear timer interrupt. (Count was cleared at the reset vector to allow timing boot.)
48 #include <boot.h>
47 #include <boot.h>
51 #include <boot.h>
50 #include <boot.h>
99 .section .boot, "ax"128 /* common boot code */
393 @ ; The page tables are generated at boot time. First430 @ ; the physical address of the boot code.
375 @ ; The page tables are generated at boot time. First412 @ ; the physical address of the boot code.
