1/*
2 * init_cm.S
3 *
4 *  Created on: Jan 12, 2011
5 *  Author: MIPS TECHNOLOGIES, INC
6 *  initializatoin of the Coherency Manager
7*/
8/*
9Unpublished work (c) MIPS Technologies, Inc.  All rights reserved.  Unpublished rights reserved
10under the copyright laws of the United States of America and other countries.
11
12This code is confidential and proprietary to MIPS Technologies, Inc. ("MIPS Technologies") and
13may be disclosed only as permitted in writing by MIPS Technologies or an authorized third party.
14Any copying, reproducing, modifying, use or disclosure of this code (in whole or in part) that is
15not expressly permitted in writing by MIPS Technologies or an authorized third party is strictly
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18
19MIPS Technologies reserves the right to change this code to improve function, design or
20otherwise. MIPS Technologies does not assume any liability arising out of the application or use
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26cover this code.
27
28This code shall not be exported, reexported, transferred, or released, directly or indirectly, in
29violation of the law of any country or international law, regulation, treaty, Executive Order,
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31reexport, transfer, or release of this code, the laws of the United States of America shall be
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33
34This code may only be disclosed to the United States government ("Government"), or to
35Government users, with prior written consent from MIPS Technologies or an authorized third
36party.  This code constitutes one or more of the following: commercial computer software,
37commercial computer software documentation or other commercial items.  If the user of this
38code, or any related documentation of any kind, including related technical data or manuals, is an
39agency, department, or other entity of the Government, the use, duplication, reproduction, release,
40modification, disclosure, or transfer of this code, or any related documentation of any kind, is
41restricted in accordance with Federal Acquisition Regulation 12.212 for civilian agencies and
42Defense Federal Acquisition Regulation Supplement 227.7202 for military agencies.  The use of
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45Technologies or an authorized third party.
46*/
47
48#include <boot.h>
49#include <regdef.h>
50#include <cps.h>
51
52	.set	noreorder           // Don't allow the assembler to reorder instructions.
53	.set	noat                // Don't allow the assembler to use r1(at) for synthetic instr.
54/**************************************************************************************
55**************************************************************************************/
56LEAF(init_cm)
57
58	beqz    r11_is_cps, done_cm_init		// skip if not a CPS or CM register verification failed.
59	nop
60
61	// Allow each core access to the CM registers (they should only access their local registers.)
62	li	    a0, 2							// Start building mask for cores in this cps.
63    sll     a0, a0, r19_more_cores
64    addiu   a0, -1							// Complete mask.
65	sw	    a0, GCR_ACCESS(r22_gcr_addr)	// GCR_ACCESS
66
67    // Check to see if this CPS implements an IOCU.
68    lw      a0, GCR_CONFIG(r22_gcr_addr)	// Load GCR_CONFIG
69	ext	    a0, a0, NUMIOCU, NUMIOCU_S		// Extract NUMIOCU.
70    beqz    a0, done_cm_init
71	lui	    a0, 0xffff
72
73	// Disable the CM regions if there is an IOCU.
74	sw	    a0, GCR_REG0_BASE(r22_gcr_addr)	// GCR_REG0_BASE
75	sw	    a0, GCR_REG0_MASK(r22_gcr_addr)	// GCR_REG0_MASK
76	sw	    a0, GCR_REG1_BASE(r22_gcr_addr)	// GCR_REG1_BASE
77	sw	    a0, GCR_REG1_MASK(r22_gcr_addr)	// GCR_REG1_MASK
78	sw	    a0, GCR_REG2_BASE(r22_gcr_addr)	// GCR_REG2_BASE
79	sw	    a0, GCR_REG2_MASK(r22_gcr_addr)	// GCR_REG2_MASK
80	sw	    a0, GCR_REG3_BASE(r22_gcr_addr)	// GCR_REG3_BASE
81	sw	    a0, GCR_REG3_MASK(r22_gcr_addr)	// GCR_REG3_MASK
82
83done_cm_init:
84	jr      ra
85	nop
86END(init_cm)
87