Searched refs:store (Results 1 – 12 of 12) sorted by relevance
174 ; /* Now store the remaining registers! */
91 sw x5, 0x4C(sp) ; First store t0 and t1
176 ; /* Now store the remaining registers! */
175 ; /* Now store the remaining registers! */
118 …s=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching cri…125 …s=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching cri…132 …s=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching cri…
157 cache 0xB, 0(a2) // Write Tag using index store tag
185 cache 0xB, 0(a2) // Write Tag using index store tag
344 /* For all VPEs, store the cpu number into the UserLocal field so it is easy to pickup. */
222 between VPEs is accomplished via a conditional load-store structure (see the variable
263 between VPEs is accomplished via a conditional load-store structure (see the variable
27 The adaptation layer requires a custom field within the `TX_THREAD` data structure to store a refer…
699 … parameter, and added logic to store thread's priority
