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Searched refs:REGB_WR32 (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.6/drivers/accel/ivpu/
Divpu_hw_40xx.c170 REGB_WR32(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD0, val); in ivpu_pll_cmd_send()
175 REGB_WR32(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD1, val); in ivpu_pll_cmd_send()
180 REGB_WR32(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD2, val); in ivpu_pll_cmd_send()
184 REGB_WR32(VPU_40XX_BUTTRESS_WP_REQ_CMD, val); in ivpu_pll_cmd_send()
421 REGB_WR32(VPU_40XX_BUTTRESS_PORT_ARBITRATION_WEIGHTS, WEIGHTS_DEFAULT); in ivpu_boot_host_ss_axi_drive()
422 REGB_WR32(VPU_40XX_BUTTRESS_PORT_ARBITRATION_WEIGHTS_ATS, WEIGHTS_ATS_DEFAULT); in ivpu_boot_host_ss_axi_drive()
666 REGB_WR32(VPU_40XX_BUTTRESS_D0I3_CONTROL, val); in ivpu_boot_d0i3_drive()
747 REGB_WR32(VPU_40XX_BUTTRESS_IP_RESET, val); in ivpu_hw_40xx_reset()
795 REGB_WR32(VPU_40XX_BUTTRESS_VPU_STATUS, val); in ivpu_hw_40xx_profiling_freq_reg_set()
809 REGB_WR32(VPU_40XX_BUTTRESS_VPU_STATUS, val); in ivpu_hw_40xx_clock_relinquish_disable()
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Divpu_hw_37xx.c145 REGB_WR32(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD0, val); in ivpu_pll_cmd_send()
150 REGB_WR32(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD1, val); in ivpu_pll_cmd_send()
154 REGB_WR32(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD2, val); in ivpu_pll_cmd_send()
158 REGB_WR32(VPU_37XX_BUTTRESS_WP_REQ_CMD, val); in ivpu_pll_cmd_send()
604 REGB_WR32(VPU_37XX_BUTTRESS_VPU_D0I3_CONTROL, val); in ivpu_boot_d0i3_drive()
647 REGB_WR32(VPU_37XX_BUTTRESS_VPU_IP_RESET, val); in ivpu_hw_37xx_reset()
869 REGB_WR32(VPU_37XX_BUTTRESS_LOCAL_INT_MASK, BUTTRESS_IRQ_ENABLE_MASK); in ivpu_hw_37xx_irq_enable()
870 REGB_WR32(VPU_37XX_BUTTRESS_GLOBAL_INT_MASK, 0x0); in ivpu_hw_37xx_irq_enable()
875 REGB_WR32(VPU_37XX_BUTTRESS_GLOBAL_INT_MASK, 0x1); in ivpu_hw_37xx_irq_disable()
876 REGB_WR32(VPU_37XX_BUTTRESS_LOCAL_INT_MASK, BUTTRESS_IRQ_DISABLE_MASK); in ivpu_hw_37xx_irq_disable()
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Divpu_hw_reg_io.h21 #define REGB_WR32(reg, val) ivpu_hw_reg_wr32(vdev, vdev->regb, (reg), (val), #reg, __func__) macro