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Searched refs:MMC_TIMING_MMC_DDR52 (Results 1 – 25 of 29) sorted by relevance

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/Linux-v4.19/drivers/mmc/host/
Ddw_mmc-hi3798cv200.c32 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
40 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
Ddw_mmc-rockchip.c51 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
109 case MMC_TIMING_MMC_DDR52: in dw_mci_rk3288_set_ios()
Dsdhci-xenon.c208 (timing == MMC_TIMING_MMC_DDR52)) in xenon_set_uhs_signaling()
343 host->timing == MMC_TIMING_MMC_DDR52) in xenon_execute_tuning()
Dsdhci-omap.c676 if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) in sdhci_omap_set_uhs_signaling()
848 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state()
854 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state()
Dsdhci-xenon-phy.c620 case MMC_TIMING_MMC_DDR52: in xenon_emmc_phy_set()
748 case MMC_TIMING_MMC_DDR52: in xenon_hs_delay_adj()
Dsdhci-pci-arasan.c283 case MMC_TIMING_MMC_DDR52: in arasan_select_phy_clock()
Dsdhci-cadence.c215 case MMC_TIMING_MMC_DDR52: in sdhci_cdns_set_uhs_signaling()
Dsdhci-of-at91.c120 if (timing == MMC_TIMING_MMC_DDR52) in sdhci_at91_set_uhs_signaling()
Dsunxi-mmc.c738 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase()
783 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate()
882 ios->timing == MMC_TIMING_MMC_DDR52) in sunxi_mmc_set_clk()
Dsdhci-st.c301 case MMC_TIMING_MMC_DDR52: in sdhci_st_set_uhs_signaling()
Dsdhci-tegra.c247 timing == MMC_TIMING_MMC_DDR52) in tegra_sdhci_set_uhs_signaling()
Ddw_mmc-exynos.c309 case MMC_TIMING_MMC_DDR52: in dw_mci_exynos_set_ios()
Dsdhci-pxav3.c279 case MMC_TIMING_MMC_DDR52: in pxav3_set_uhs_signaling()
Drtsx_pci_sdmmc.c994 case MMC_TIMING_MMC_DDR52: in sd_set_timing()
1075 case MMC_TIMING_MMC_DDR52: in sdmmc_set_ios()
Dmmci.c354 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
827 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
Dsdhci-msm.c316 ios.timing == MMC_TIMING_MMC_DDR52 || in msm_get_clock_rate_for_bus_mode()
1167 case MMC_TIMING_MMC_DDR52: in sdhci_msm_set_uhs_signaling()
Dsdhci.c1381 case MMC_TIMING_MMC_DDR52: in sdhci_get_preset_value()
1710 (timing == MMC_TIMING_MMC_DDR52)) in sdhci_set_uhs_signaling()
1781 ios->timing == MMC_TIMING_MMC_DDR52 || in sdhci_set_ios()
1850 (ios->timing == MMC_TIMING_MMC_DDR52))) { in sdhci_set_ios()
Dcavium.c868 if (ios->bus_width && ios->timing == MMC_TIMING_MMC_DDR52) in cvm_mmc_set_ios()
Domap_hsmmc.c627 (ios->timing != MMC_TIMING_MMC_DDR52) && in omap_hsmmc_set_clock()
648 if (ios->timing == MMC_TIMING_MMC_DDR52 || in omap_hsmmc_set_bus_width()
Dsdhci-esdhc-imx.c988 case MMC_TIMING_MMC_DDR52: in esdhc_set_uhs_signaling()
/Linux-v4.19/drivers/mmc/core/
Dhost.h70 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; in mmc_card_ddr52()
Ddebugfs.c146 case MMC_TIMING_MMC_DDR52: in mmc_ios_show()
Dmmc.c1093 MMC_TIMING_MMC_DDR52, in mmc_select_hs_ddr()
1251 mmc_set_timing(host, MMC_TIMING_MMC_DDR52); in mmc_hs400_to_hs200()
/Linux-v4.19/include/linux/mmc/
Dhost.h63 #define MMC_TIMING_MMC_DDR52 8 macro
/Linux-v4.19/drivers/staging/greybus/
Dsdio.c666 case MMC_TIMING_MMC_DDR52: in gb_mmc_set_ios()

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