/Linux-v5.15/drivers/dma/ |
D | imx-sdma.c | 3 // drivers/dma/imx-sdma.c 46 /* SDMA registers */ 103 * Error bit set in the CCB status field by the SDMA, 144 * 28 Lower WML Event(LWE) SDMA events reg to check for 148 * 29 Higher WML Event(HWE) SDMA events reg to check for 184 * struct sdma_script_start_addrs - SDMA script start pointers 187 * address space of the SDMA engine. 266 * @unused: padding. The SDMA engine expects an array of 128 byte 276 * struct sdma_state_registers - SDMA context for a channel 305 * struct sdma_context_data - sdma context specific to a channel [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/dma/ |
D | fsl-imx-sdma.txt | 1 * Freescale Smart Direct Memory Access (SDMA) Controller for i.MX 5 "fsl,imx25-sdma" 6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma" 7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma" 8 "fsl,imx51-sdma" 9 "fsl,imx53-sdma" 10 "fsl,imx6q-sdma" 11 "fsl,imx7d-sdma" 12 "fsl,imx6ul-sdma" 13 "fsl,imx8mq-sdma" [all …]
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/Linux-v5.15/drivers/net/ethernet/marvell/prestera/ |
D | prestera_rxtx.c | 105 /* protect SDMA with concurrrent access from multiple CPUs */ 110 struct prestera_sdma sdma; member 113 static int prestera_sdma_buf_init(struct prestera_sdma *sdma, in prestera_sdma_buf_init() argument 119 desc = dma_pool_alloc(sdma->desc_pool, GFP_DMA | GFP_KERNEL, &dma); in prestera_sdma_buf_init() 131 static u32 prestera_sdma_map(struct prestera_sdma *sdma, dma_addr_t pa) in prestera_sdma_map() argument 133 return sdma->map_addr + pa; in prestera_sdma_map() 136 static void prestera_sdma_rx_desc_init(struct prestera_sdma *sdma, in prestera_sdma_rx_desc_init() argument 145 desc->buff = cpu_to_le32(prestera_sdma_map(sdma, buf)); in prestera_sdma_rx_desc_init() 153 static void prestera_sdma_rx_desc_set_next(struct prestera_sdma *sdma, in prestera_sdma_rx_desc_set_next() argument 157 desc->next = cpu_to_le32(prestera_sdma_map(sdma, next)); in prestera_sdma_rx_desc_set_next() [all …]
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/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_sdma.c | 29 /* SDMA CSA reside in the 3rd page of CSA */ 33 * GPU SDMA IP block helpers function. 41 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_sdma_get_instance_from_ring() 42 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_instance_from_ring() 43 ring == &adev->sdma.instance[i].page) in amdgpu_sdma_get_instance_from_ring() 44 return &adev->sdma.instance[i]; in amdgpu_sdma_get_instance_from_ring() 54 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_get_index_from_ring() 55 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_index_from_ring() 56 ring == &adev->sdma.instance[i].page) { in amdgpu_sdma_get_index_from_ring() 73 /* don't enable OS preemption on SDMA under SRIOV */ in amdgpu_sdma_get_csa_mc_addr() [all …]
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D | sdma_v4_0.c | 554 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_setup_ulv() 586 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_destroy_inst_ctx() 587 release_firmware(adev->sdma.instance[i].fw); in sdma_v4_0_destroy_inst_ctx() 588 adev->sdma.instance[i].fw = NULL; in sdma_v4_0_destroy_inst_ctx() 591 all SDMA isntances */ in sdma_v4_0_destroy_inst_ctx() 597 memset((void *)adev->sdma.instance, 0, in sdma_v4_0_destroy_inst_ctx() 659 err = request_firmware(&adev->sdma.instance[0].fw, fw_name, adev->dev); in sdma_v4_0_init_microcode() 663 err = sdma_v4_0_init_inst_ctx(&adev->sdma.instance[0]); in sdma_v4_0_init_microcode() 667 for (i = 1; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode() 671 for every SDMA instance */ in sdma_v4_0_init_microcode() [all …]
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D | cik_sdma.c | 76 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_free_microcode() 77 release_firmware(adev->sdma.instance[i].fw); in cik_sdma_free_microcode() 78 adev->sdma.instance[i].fw = NULL; in cik_sdma_free_microcode() 83 * sDMA - System DMA 91 * (ring buffer, IBs, etc.), but sDMA has it's own 93 * used by the CP. sDMA supports copying data, writing 135 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode() 140 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in cik_sdma_init_microcode() 143 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in cik_sdma_init_microcode() 148 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode() [all …]
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D | sdma_v2_4.c | 81 * sDMA - System DMA 89 * (ring buffer, IBs, etc.), but sDMA has it's own 91 * used by the CP. sDMA supports copying data, writing 116 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_free_microcode() 117 release_firmware(adev->sdma.instance[i].fw); in sdma_v2_4_free_microcode() 118 adev->sdma.instance[i].fw = NULL; in sdma_v2_4_free_microcode() 149 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode() 154 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v2_4_init_microcode() 157 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v2_4_init_microcode() 160 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v2_4_init_microcode() [all …]
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D | sdma_v3_0.c | 182 * sDMA - System DMA 190 * (ring buffer, IBs, etc.), but sDMA has it's own 192 * used by the CP. sDMA supports copying data, writing 253 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_free_microcode() 254 release_firmware(adev->sdma.instance[i].fw); in sdma_v3_0_free_microcode() 255 adev->sdma.instance[i].fw = NULL; in sdma_v3_0_free_microcode() 307 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode() 312 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v3_0_init_microcode() 315 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v3_0_init_microcode() 318 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v3_0_init_microcode() [all …]
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D | sdma_v5_2.c | 111 release_firmware(adev->sdma.instance[0].fw); in sdma_v5_2_destroy_inst_ctx() 113 memset((void *)adev->sdma.instance, 0, in sdma_v5_2_destroy_inst_ctx() 164 err = request_firmware(&adev->sdma.instance[0].fw, fw_name, adev->dev); in sdma_v5_2_init_microcode() 168 err = sdma_v5_2_init_inst_ctx(&adev->sdma.instance[0]); in sdma_v5_2_init_microcode() 172 for (i = 1; i < adev->sdma.num_instances; i++) in sdma_v5_2_init_microcode() 173 memcpy((void *)&adev->sdma.instance[i], in sdma_v5_2_init_microcode() 174 (void *)&adev->sdma.instance[0], in sdma_v5_2_init_microcode() 184 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_init_microcode() 187 info->fw = adev->sdma.instance[i].fw; in sdma_v5_2_init_microcode() 318 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v5_2_ring_insert_nop() local [all …]
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D | sdma_v5_0.c | 276 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode() 281 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v5_0_init_microcode() 284 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v5_0_init_microcode() 287 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v5_0_init_microcode() 288 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v5_0_init_microcode() 289 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v5_0_init_microcode() 290 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v5_0_init_microcode() 291 adev->sdma.instance[i].burst_nop = true; in sdma_v5_0_init_microcode() 298 info->fw = adev->sdma.instance[i].fw; in sdma_v5_0_init_microcode() 307 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode() [all …]
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D | si_dma.c | 49 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_get_wptr() 57 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_set_wptr() 120 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_stop() 121 ring = &adev->sdma.instance[i].ring; in si_dma_stop() 139 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_start() 140 ring = &adev->sdma.instance[i].ring; in si_dma_start() 359 * si_dma_vm_set_pte_pde - update the page tables using sDMA 368 * Update the page tables using sDMA (CIK). 440 * si_dma_ring_emit_vm_flush - cik vm flush using sDMA 447 * using sDMA (VI). [all …]
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D | sdma_v4_4.c | 24 #include "sdma/sdma_4_4_0_offset.h" 25 #include "sdma/sdma_4_4_0_sh_mask.h" 35 * to calculate register offset for all the sdma instances */ 176 /* the SDMA_EDC_COUNTER register in each sdma instance in sdma_v4_4_get_ras_error_count() 183 dev_info(adev->dev, "Detected %s in SDMA%d, SED %d\n", in sdma_v4_4_get_ras_error_count() 218 * SDMA RAS supports single bit uncorrectable error detection. in sdma_v4_4_query_ras_error_count() 224 * SDMA RAS does not support correctable errors. in sdma_v4_4_query_ras_error_count() 237 /* write 0 to EDC_COUNTER reg to clear sdma edc counters */ in sdma_v4_4_reset_ras_error_count() 239 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_reset_ras_error_count()
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/Linux-v5.15/arch/arm/boot/dts/ |
D | omap2.dtsi | 65 dmas = <&sdma 9 &sdma 10>; 103 sdma: dma-controller@0 { label 104 compatible = "ti,omap2420-sdma", "ti,omap-sdma"; 139 dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38 140 &sdma 39 &sdma 40 &sdma 41 &sdma 42>; 150 dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>; 166 dmas = <&sdma 13>; 175 dmas = <&sdma 49 &sdma 50>; 185 dmas = <&sdma 51 &sdma 52>; 195 dmas = <&sdma 53 &sdma 54>;
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D | omap3.dtsi | 184 dmas = <&sdma 9 &sdma 10>; 210 dmas = <&sdma 65 &sdma 66>; 292 sdma: dma-controller@0 { label 293 compatible = "ti,omap3430-sdma", "ti,omap-sdma"; 376 dmas = <&sdma 49 &sdma 50>; 386 dmas = <&sdma 51 &sdma 52>; 396 dmas = <&sdma 53 &sdma 54>; 451 dmas = <&sdma 35>, 452 <&sdma 36>, 453 <&sdma 37>, [all …]
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D | omap2430.dtsi | 189 dmas = <&sdma 31>, 190 <&sdma 32>; 205 dmas = <&sdma 33>, 206 <&sdma 34>; 221 dmas = <&sdma 17>, 222 <&sdma 18>; 237 dmas = <&sdma 19>, 238 <&sdma 20>; 253 dmas = <&sdma 21>, 254 <&sdma 22>; [all …]
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D | imx6sll.dtsi | 159 dmas = <&sdma 14 18 0>, <&sdma 15 18 0>; 183 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; 195 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; 207 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; 219 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; 232 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; 245 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; 258 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; 270 dmas = <&sdma 37 22 0>, <&sdma 38 22 0>; 283 dmas = <&sdma 41 22 0>, <&sdma 42 22 0>; [all …]
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D | imx31.dtsi | 135 dmas = <&sdma 8 8 0>, <&sdma 9 8 0>; 182 dmas = <&sdma 20 3 0>; 193 dmas = <&sdma 21 3 0>; 213 dmas = <&sdma 6 8 0>, <&sdma 7 8 0>; 248 dmas = <&sdma 10 8 0>, <&sdma 11 8 0>; 300 sdma: sdma@53fd4000 { label 301 compatible = "fsl,imx31-sdma"; 307 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx31.bin"; 348 dmas = <&sdma 30 17 0>;
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D | imx6qdl.dtsi | 312 dmas = <&sdma 14 18 0>, 313 <&sdma 15 18 0>; 337 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; 351 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; 365 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; 379 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; 391 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; 407 dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; 421 dmas = <&sdma 37 1 0>, 422 <&sdma 38 1 0>; [all …]
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D | imx6sx.dtsi | 257 dmas = <&sdma 14 18 0>, 258 <&sdma 15 18 0>; 331 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; 347 dmas = <&sdma 23 21 0>, 348 <&sdma 24 21 0>; 361 dmas = <&sdma 37 1 0>, <&sdma 38 1 0>; 375 dmas = <&sdma 41 1 0>, <&sdma 42 1 0>; 389 dmas = <&sdma 45 1 0>, <&sdma 46 1 0>; 411 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, 412 <&sdma 19 23 1>, <&sdma 20 23 1>, [all …]
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D | imx53.dtsi | 270 dmas = <&sdma 42 4 0>, <&sdma 43 4 0>; 297 dmas = <&sdma 24 1 0>, 298 <&sdma 25 1 0>; 554 dmas = <&sdma 18 4 0>, <&sdma 19 4 0>; 566 dmas = <&sdma 12 4 0>, <&sdma 13 4 0>; 652 dmas = <&sdma 2 4 0>, <&sdma 3 4 0>; 684 dmas = <&sdma 16 4 0>, <&sdma 17 4 0>; 713 sdma: sdma@63fb0000 { label 714 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; 721 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; [all …]
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/Linux-v5.15/drivers/infiniband/hw/hfi1/ |
D | vnic_sdma.c | 7 * This file contains HFI1 support for VNIC SDMA functionality 10 #include "sdma.h" 21 * @txreq: sdma transmit request 22 * @sdma: vnic sdma pointer 30 struct hfi1_vnic_sdma *sdma; member 42 struct hfi1_vnic_sdma *vnic_sdma = tx->sdma; in vnic_sdma_complete() 129 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; in hfi1_vnic_send_dma() 146 tx->sdma = vnic_sdma; in hfi1_vnic_send_dma() 156 /* When -ECOMM, sdma callback will be called with ABORT status */ in hfi1_vnic_send_dma() 178 * hfi1_vnic_sdma_sleep - vnic sdma sleep function [all …]
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D | vnic.h | 10 #include "sdma.h" 33 * struct hfi1_vnic_sdma - VNIC per Tx ring SDMA information 35 * @sde - sdma engine 38 * @stx - sdma tx request 39 * @state - vnic Tx ring SDMA state 79 * @sdma: VNIC SDMA structure per TXQ 95 struct hfi1_vnic_sdma sdma[HFI1_VNIC_MAX_TXQ]; member
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D | Kconfig | 11 bool "HFI1 SDMA Order debug" 16 sdma completions for unit testing 18 bool "Config SDMA Verbosity" 23 SDMA debug
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/Linux-v5.15/arch/powerpc/include/asm/ |
D | mpc52xx.h | 77 /* SDMA */ 79 u32 taskBar; /* SDMA + 0x00 */ 80 u32 currentPointer; /* SDMA + 0x04 */ 81 u32 endPointer; /* SDMA + 0x08 */ 82 u32 variablePointer; /* SDMA + 0x0c */ 84 u8 IntVect1; /* SDMA + 0x10 */ 85 u8 IntVect2; /* SDMA + 0x11 */ 86 u16 PtdCntrl; /* SDMA + 0x12 */ 88 u32 IntPend; /* SDMA + 0x14 */ 89 u32 IntMask; /* SDMA + 0x18 */ [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/sound/ |
D | fsl,asrc.txt | 74 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, 75 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
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