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Searched +full:meson +full:- +full:g12a +full:- +full:usb3 +full:- +full:pcie +full:- +full:phy (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.10/drivers/phy/amlogic/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Amlogic platforms
6 tristate "Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY driver"
14 Enable this to support the Meson USB2 PHYs found in Meson8,
19 tristate "Meson GXL and GXM USB2 PHY drivers"
26 Enable this to support the Meson USB2 PHYs found in Meson
31 tristate "Meson G12A USB2 PHY driver"
37 Enable this to support the Meson USB2 PHYs found in Meson
38 G12A SoCs.
42 tristate "Meson G12A USB3+PCIE Combo PHY driver"
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DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
3 obj-$(CONFIG_PHY_MESON_GXL_USB2) += phy-meson-gxl-usb2.o
4 obj-$(CONFIG_PHY_MESON_G12A_USB2) += phy-meson-g12a-usb2.o
5 obj-$(CONFIG_PHY_MESON_G12A_USB3_PCIE) += phy-meson-g12a-usb3-pcie.o
6 obj-$(CONFIG_PHY_MESON_AXG_PCIE) += phy-meson-axg-pcie.o
7 obj-$(CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG) += phy-meson-axg-mipi-pcie-analog.o
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Damlogic,meson-g12a-usb3-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic G12A USB3 + PCIE Combo PHY
11 - Neil Armstrong <narmstrong@baylibre.com>
16 - amlogic,meson-g12a-usb3-pcie-phy
24 clock-names:
26 - const: ref_clk
31 reset-names:
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/Linux-v5.10/arch/arm64/boot/dts/amlogic/
Dmeson-sm1-khadas-vim3l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1.dtsi"
10 #include "meson-khadas-vim3.dtsi"
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
17 vddcpu: regulator-vddcpu {
21 compatible = "pwm-regulator";
23 regulator-name = "VDDCPU";
24 regulator-min-microvolt = <690000>;
25 regulator-max-microvolt = <1050000>;
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Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/Linux-v5.10/drivers/usb/dwc3/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 tristate "DesignWare USB3 DRD Core Support"
10 USB controller based on the DesignWare USB3 IP Core.
18 bool "Register ULPI PHY Interface"
21 Select this if you have ULPI type PHY attached to your DWC3
73 Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
77 tristate "PCIe-based Platforms"
81 If you're using the DesignWare Core IP with a PCIe (but not HAPS
85 tristate "Synopsys PCIe-based HAPS Platforms"
89 If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
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/Linux-v5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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