Lines Matching +full:meson +full:- +full:g12a +full:- +full:usb3 +full:- +full:pcie +full:- +full:phy

1 # SPDX-License-Identifier: GPL-2.0
4 	tristate "DesignWare USB3 DRD Core Support"
10 	  USB controller based on the DesignWare USB3 IP Core.
18 	bool "Register ULPI PHY Interface"
21 	  Select this if you have ULPI type PHY attached to your DWC3
73 	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
77 	tristate "PCIe-based Platforms"
81 	  If you're using the DesignWare Core IP with a PCIe (but not HAPS
85 	tristate "Synopsys PCIe-based HAPS Platforms"
89 	  If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
101 	tristate "Amlogic Meson G12A Platforms"
108 	  Support USB2/3 functionality in Amlogic G12A platforms.
117 	  Currently supports Xilinx and Qualcomm DWC USB3 IP.
125 	  STMicroelectronics SoCs with one DesignWare Core USB3 IP