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/Linux-v5.10/Documentation/devicetree/bindings/clock/
Dqcom,gcc-qcs404.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Bindingfor QCS404
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
15 power domains on QCS404.
18 - dt-bindings/clock/qcom,gcc-qcs404.h
22 const: qcom,gcc-qcs404
[all …]
Dqcom,turingcc.txt2 ------------------------------------------------
5 - compatible: shall contain "qcom,qcs404-turingcc".
6 - reg: shall contain base register location and length.
7 - clocks: ahb clock for the TuringCC
8 - #clock-cells: from common clock binding, shall contain 1.
9 - #reset-cells: from common reset binding, shall contain 1.
12 turingcc: clock-controller@800000 {
13 compatible = "qcom,qcs404-turingcc";
15 clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>;
17 #clock-cells = <1>;
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Dqcom,q6sstopcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Govind Singh <govinds@codeaurora.org>
14 const: "qcom,qcs404-q6sstopcc"
18 - description: Q6SSTOP clocks register region
19 - description: Q6SSTOP_TCSR register region
23 - description: ahb clock for the q6sstopCC
25 '#clock-cells':
29 - compatible
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/Linux-v5.10/arch/arm64/boot/dts/qcom/
Dqcs404.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
6 #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/thermal/thermal.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
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Dqcs404-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include "qcs404.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 stdout-path = "serial0";
20 vph_pwr: vph-pwr-regulator {
21 compatible = "regulator-fixed";
22 regulator-name = "vph_pwr";
23 regulator-always-on;
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/Linux-v5.10/Documentation/devicetree/bindings/pci/
Dqcom,pcie.txt3 - compatible:
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sdm845" for sdm845
[all …]
/Linux-v5.10/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
287 tristate "QCS404 Global Clock Controller"
289 Support for the global clock controller on QCS404 devices.
361 tristate "QCS404 Turing Clock Controller"
363 Support for the Turing Clock Controller on QCS404, provides clocks
367 tristate "QCS404 Q6SSTOP Clock Controller"
370 Support for the Q6SSTOP clock controller on QCS404 devices.
484 tristate "High-Frequency PLL (HFPLL) Clock Controller"
486 Support for the high-frequency PLLs present on Qualcomm devices.
493 Support for the Krait ACC and GCC clock controllers. Say Y
Dgcc-qcs404.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
14 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-pll.h"
19 #include "clk-rcg.h"
20 #include "clk-regmap.h"
282 .parent_names = (const char *[]){ "xo-board" },
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/Linux-v5.10/Documentation/devicetree/bindings/net/
Dqcom,ethqos.txt10 - compatible: Should be qcom,qcs404-ethqos"
12 - reg: Address and length of the register set for the device
14 - reg-names: Should contain register names "stmmaceth", "rgmii"
16 - clocks: Should contain phandle to clocks
18 - clock-names: Should contain clock names "stmmaceth", "pclk",
21 - interrupts: Should contain phandle to interrupts
23 - interrupt-names: Should contain interrupt names "macirq", "eth_lpi"
31 compatible = "qcom,qcs404-ethqos";
34 reg-names = "stmmaceth", "rgmii";
35 clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dqcom-pcie2-phy.txt8 - compatible: compatible list, should be:
9 "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy"
11 - reg: offset and length of the PHY register set.
12 - #phy-cells: must be 0.
14 - clocks: a clock-specifier pair for the "pipe" clock
16 - vdda-vp-supply: phandle to low voltage regulator
17 - vdda-vph-supply: phandle to high voltage regulator
19 - resets: reset-specifier pairs for the "phy" and "pipe" resets
20 - reset-names: list of resets, should contain:
23 - clock-output-names: name of the outgoing clock signal from the PHY PLL
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Dqcom,usb-ss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
18 - qcom,usb-ss-28nm-phy
23 "#phy-cells":
28 - description: rpmcc clock
29 - description: PHY AHB clock
30 - description: SuperSpeed pipe clock
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Dqcom,usb-hs-28nm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
13 Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY
18 - qcom,usb-hs-28nm-femtophy
23 "#phy-cells":
28 - description: rpmcc ref clock
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/mailbox/
Dqcom,apcs-kpss-global.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
14 - Sivaprakash Murugesan <sivaprak@codeaurora.org>
19 - qcom,ipq6018-apcs-apps-global
20 - qcom,ipq8074-apcs-apps-global
21 - qcom,msm8916-apcs-kpss-global
22 - qcom,msm8994-apcs-kpss-global
23 - qcom,msm8996-apcs-hmss-global
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/remoteproc/
Dqcom,hexagon-v56.txt6 - compatible:
10 "qcom,qcs404-cdsp-pil",
11 "qcom,sdm845-adsp-pil"
13 - reg:
15 Value type: <prop-encoded-array>
18 - interrupts-extended:
20 Value type: <prop-encoded-array>
22 stop-ack IRQs
24 - interrupt-names:
27 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.txt1 * Qualcomm SDHCI controller (sdhci-msm)
4 and the properties used by the sdhci-msm driver.
7 - compatible: Should contain a SoC-specific string and a IP version string:
9 "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
10 "qcom,sdhci-msm-v5" for sdcc version 5.0
13 string is added to support this change - "qcom,sdhci-msm-v5".
15 "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
16 "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
17 "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
18 "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
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