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Searched +full:clr +full:- +full:gpios (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.1/drivers/gpio/
Dgpio-mmio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic driver for memory-mapped GPIO controllers.
22 * . big-endian notation, just`. .. A bit more sophisticated controllers ,
23 * . register the device with -be`. .with a pair of set/clear-bit registers ,
29 * .. The expectation is that in at least some cases . ,-~~~-,
30 * .this will be used with roll-your-own ASIC/FPGA .` \ /
38 * . the number of GPIOs is determined by the width of ~
127 if (gc->be_bits) in bgpio_line2mask()
128 return BIT(gc->bgpio_bits - 1 - line); in bgpio_line2mask()
135 bool dir = !!(gc->bgpio_dir & pinmask); in bgpio_get_set()
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/Linux-v6.1/drivers/pinctrl/
Dpinctrl-microchip-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
136 addr->port = pin / priv->bitcount; in sgpio_pin_to_addr()
137 addr->bit = pin % priv->bitcount; in sgpio_pin_to_addr()
142 return bit + port * priv->bitcount; in sgpio_addr_to_pin()
147 return (priv->properties->regoff[rno] + off) * in sgpio_get_addr()
148 regmap_get_reg_stride(priv->regs); in sgpio_get_addr()
157 ret = regmap_read(priv->regs, addr, &val); in sgpio_readl()
169 ret = regmap_write(priv->regs, addr, val); in sgpio_writel()
179 ret = regmap_update_bits(priv->regs, addr, clear | set, set); in sgpio_clrsetbits()
185 int width = priv->bitcount - 1; in sgpio_configure_bitstream()
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/Linux-v6.1/Documentation/devicetree/bindings/iio/dac/
Dadi,ltc2688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2688 16 channel, 16 bit, +-15V DAC
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2688.pdf
19 - adi,ltc2688
24 vcc-supply:
27 iovcc-supply:
30 vref-supply:
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/Linux-v6.1/arch/m68k/include/asm/
Dmcfgpio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <asm-generic/gpio.h>
28 return -EINVAL; in __gpio_get_value()
42 return -EINVAL; in __gpio_cansleep()
47 return -EINVAL; in __gpio_to_irq()
55 return -EINVAL; in gpio_direction_input()
63 return -EINVAL; in gpio_direction_output()
71 return -EINVAL; in gpio_request()
88 * input; some require a read-modify-write access to change an output, others
90 * GPIOs in a single control area, others have some GPIOs implemented in
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/Linux-v6.1/include/linux/gpio/
Ddriver.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/pinctrl/pinconf-generic.h>
39 * struct gpio_irq_chip - GPIO interrupt controller
76 * If non-NULL, will be set as the parent of this GPIO interrupt
88 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
96 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
111 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
260 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
271 * If not %NULL, holds bitmask of GPIOs which are valid to be included
313 * struct gpio_chip - abstract a GPIO controller
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/Linux-v6.1/drivers/spi/
Dspi-lantiq-ssc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 * Copyright (C) 2016 Hauke Mehrtens <hauke@hauke-m.de>
141 #define LTQ_SPI_RXCNT_TODO_M 0xFFFF /* Recevie to-do value */
190 return __raw_readl(spi->regbase + reg); in lantiq_ssc_readl()
196 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_writel()
199 static void lantiq_ssc_maskl(const struct lantiq_ssc_spi *spi, u32 clr, in lantiq_ssc_maskl() argument
202 u32 val = __raw_readl(spi->regbase + reg); in lantiq_ssc_maskl()
204 val &= ~clr; in lantiq_ssc_maskl()
206 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_maskl()
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