1 // SPDX-License-Identifier: GPL-2.0+
3  * Generic driver for memory-mapped GPIO controllers.
22  * .   big-endian notation, just`.  .. A bit more sophisticated controllers ,
23  *  . register the device with -be`. .with a pair of set/clear-bit registers ,
29  * .. The expectation is that in at least some cases .    ,-~~~-,
30  *  .this will be used with roll-your-own ASIC/FPGA .`     \   /
38  *            . the number of GPIOs is determined by the width of   ~
127 	if (gc->be_bits)  in bgpio_line2mask()
128 		return BIT(gc->bgpio_bits - 1 - line);  in bgpio_line2mask()
135 	bool dir = !!(gc->bgpio_dir & pinmask);  in bgpio_get_set()
138 		return !!(gc->read_reg(gc->reg_set) & pinmask);  in bgpio_get_set()
140 		return !!(gc->read_reg(gc->reg_dat) & pinmask);  in bgpio_get_set()
156 	set_mask = *mask & gc->bgpio_dir;  in bgpio_get_set_multiple()
157 	get_mask = *mask & ~gc->bgpio_dir;  in bgpio_get_set_multiple()
160 		*bits |= gc->read_reg(gc->reg_set) & set_mask;  in bgpio_get_set_multiple()
162 		*bits |= gc->read_reg(gc->reg_dat) & get_mask;  in bgpio_get_set_multiple()
169 	return !!(gc->read_reg(gc->reg_dat) & bgpio_line2mask(gc, gpio));  in bgpio_get()
180 	*bits |= gc->read_reg(gc->reg_dat) & *mask;  in bgpio_get_multiple()
198 	for_each_set_bit(bit, mask, gc->ngpio)  in bgpio_get_multiple_be()
202 	val = gc->read_reg(gc->reg_dat) & readmask;  in bgpio_get_multiple_be()
208 	for_each_set_bit(bit, &val, gc->ngpio)  in bgpio_get_multiple_be()
223 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_set()
226 		gc->bgpio_data |= mask;  in bgpio_set()
228 		gc->bgpio_data &= ~mask;  in bgpio_set()
230 	gc->write_reg(gc->reg_dat, gc->bgpio_data);  in bgpio_set()
232 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_set()
241 		gc->write_reg(gc->reg_set, mask);  in bgpio_set_with_clear()
243 		gc->write_reg(gc->reg_clr, mask);  in bgpio_set_with_clear()
251 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_set_set()
254 		gc->bgpio_data |= mask;  in bgpio_set_set()
256 		gc->bgpio_data &= ~mask;  in bgpio_set_set()
258 	gc->write_reg(gc->reg_set, gc->bgpio_data);  in bgpio_set_set()
260 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_set_set()
273 	for_each_set_bit(i, mask, gc->bgpio_bits) {  in bgpio_multiple_get_masks()
289 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_set_multiple_single_reg()
293 	gc->bgpio_data |= set_mask;  in bgpio_set_multiple_single_reg()
294 	gc->bgpio_data &= ~clear_mask;  in bgpio_set_multiple_single_reg()
296 	gc->write_reg(reg, gc->bgpio_data);  in bgpio_set_multiple_single_reg()
298 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_set_multiple_single_reg()
304 	bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);  in bgpio_set_multiple()
310 	bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);  in bgpio_set_multiple_set()
322 		gc->write_reg(gc->reg_set, set_mask);  in bgpio_set_multiple_with_clear()
324 		gc->write_reg(gc->reg_clr, clear_mask);  in bgpio_set_multiple_with_clear()
335 	return -EINVAL;  in bgpio_dir_out_err()
341 	gc->set(gc, gpio, val);  in bgpio_simple_dir_out()
350 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_dir_in()
352 	gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);  in bgpio_dir_in()
354 	if (gc->reg_dir_in)  in bgpio_dir_in()
355 		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);  in bgpio_dir_in()
356 	if (gc->reg_dir_out)  in bgpio_dir_in()
357 		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);  in bgpio_dir_in()
359 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_dir_in()
367 	if (gc->bgpio_dir_unreadable) {  in bgpio_get_dir()
368 		if (gc->bgpio_dir & bgpio_line2mask(gc, gpio))  in bgpio_get_dir()
373 	if (gc->reg_dir_out) {  in bgpio_get_dir()
374 		if (gc->read_reg(gc->reg_dir_out) & bgpio_line2mask(gc, gpio))  in bgpio_get_dir()
379 	if (gc->reg_dir_in)  in bgpio_get_dir()
380 		if (!(gc->read_reg(gc->reg_dir_in) & bgpio_line2mask(gc, gpio)))  in bgpio_get_dir()
390 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);  in bgpio_dir_out()
392 	gc->bgpio_dir |= bgpio_line2mask(gc, gpio);  in bgpio_dir_out()
394 	if (gc->reg_dir_in)  in bgpio_dir_out()
395 		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);  in bgpio_dir_out()
396 	if (gc->reg_dir_out)  in bgpio_dir_out()
397 		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);  in bgpio_dir_out()
399 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);  in bgpio_dir_out()
406 	gc->set(gc, gpio, val);  in bgpio_dir_out_dir_first()
413 	gc->set(gc, gpio, val);  in bgpio_dir_out_val_first()
423 	switch (gc->bgpio_bits) {  in bgpio_setup_accessors()
425 		gc->read_reg	= bgpio_read8;  in bgpio_setup_accessors()
426 		gc->write_reg	= bgpio_write8;  in bgpio_setup_accessors()
430 			gc->read_reg	= bgpio_read16be;  in bgpio_setup_accessors()
431 			gc->write_reg	= bgpio_write16be;  in bgpio_setup_accessors()
433 			gc->read_reg	= bgpio_read16;  in bgpio_setup_accessors()
434 			gc->write_reg	= bgpio_write16;  in bgpio_setup_accessors()
439 			gc->read_reg	= bgpio_read32be;  in bgpio_setup_accessors()
440 			gc->write_reg	= bgpio_write32be;  in bgpio_setup_accessors()
442 			gc->read_reg	= bgpio_read32;  in bgpio_setup_accessors()
443 			gc->write_reg	= bgpio_write32;  in bgpio_setup_accessors()
451 			return -EINVAL;  in bgpio_setup_accessors()
453 			gc->read_reg	= bgpio_read64;  in bgpio_setup_accessors()
454 			gc->write_reg	= bgpio_write64;  in bgpio_setup_accessors()
459 		dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);  in bgpio_setup_accessors()
460 		return -EINVAL;  in bgpio_setup_accessors()
470  *	- single input/output register resource (named "dat").
471  *	- set/clear pair (named "set" and "clr").
472  *	- single output register resource and single input resource ("set" and
476  * by clearing a bit.  For the set clr pair, this drives a 1 by setting a bit
482  *	- simple bidirection GPIO that requires no configuration.
483  *	- an output direction register (named "dirout") where a 1 bit
485  *	- an input direction register (named "dirin") where a 1 bit indicates
491 			  void __iomem *clr,  in bgpio_setup_io()  argument
495 	gc->reg_dat = dat;  in bgpio_setup_io()
496 	if (!gc->reg_dat)  in bgpio_setup_io()
497 		return -EINVAL;  in bgpio_setup_io()
499 	if (set && clr) {  in bgpio_setup_io()
500 		gc->reg_set = set;  in bgpio_setup_io()
501 		gc->reg_clr = clr;  in bgpio_setup_io()
502 		gc->set = bgpio_set_with_clear;  in bgpio_setup_io()
503 		gc->set_multiple = bgpio_set_multiple_with_clear;  in bgpio_setup_io()
504 	} else if (set && !clr) {  in bgpio_setup_io()
505 		gc->reg_set = set;  in bgpio_setup_io()
506 		gc->set = bgpio_set_set;  in bgpio_setup_io()
507 		gc->set_multiple = bgpio_set_multiple_set;  in bgpio_setup_io()
509 		gc->set = bgpio_set_none;  in bgpio_setup_io()
510 		gc->set_multiple = NULL;  in bgpio_setup_io()
512 		gc->set = bgpio_set;  in bgpio_setup_io()
513 		gc->set_multiple = bgpio_set_multiple;  in bgpio_setup_io()
518 		gc->get = bgpio_get_set;  in bgpio_setup_io()
519 		if (!gc->be_bits)  in bgpio_setup_io()
520 			gc->get_multiple = bgpio_get_set_multiple;  in bgpio_setup_io()
522 		 * We deliberately avoid assigning the ->get_multiple() call  in bgpio_setup_io()
529 		gc->get = bgpio_get;  in bgpio_setup_io()
530 		if (gc->be_bits)  in bgpio_setup_io()
531 			gc->get_multiple = bgpio_get_multiple_be;  in bgpio_setup_io()
533 			gc->get_multiple = bgpio_get_multiple;  in bgpio_setup_io()
545 		gc->reg_dir_out = dirout;  in bgpio_setup_direction()
546 		gc->reg_dir_in = dirin;  in bgpio_setup_direction()
548 			gc->direction_output = bgpio_dir_out_dir_first;  in bgpio_setup_direction()
550 			gc->direction_output = bgpio_dir_out_val_first;  in bgpio_setup_direction()
551 		gc->direction_input = bgpio_dir_in;  in bgpio_setup_direction()
552 		gc->get_direction = bgpio_get_dir;  in bgpio_setup_direction()
555 			gc->direction_output = bgpio_dir_out_err;  in bgpio_setup_direction()
557 			gc->direction_output = bgpio_simple_dir_out;  in bgpio_setup_direction()
558 		gc->direction_input = bgpio_simple_dir_in;  in bgpio_setup_direction()
566 	if (gpio_pin < chip->ngpio)  in bgpio_request()
569 	return -EINVAL;  in bgpio_request()
573  * bgpio_init() - Initialize generic GPIO accessor functions
583  * @clr: MMIO address for the register to CLEAR the value of the GPIO lines, it is
601 	       void __iomem *clr, void __iomem *dirout, void __iomem *dirin,  in bgpio_init()  argument
607 		return -EINVAL;  in bgpio_init()
609 	gc->bgpio_bits = sz * 8;  in bgpio_init()
610 	if (gc->bgpio_bits > BITS_PER_LONG)  in bgpio_init()
611 		return -EINVAL;  in bgpio_init()
613 	raw_spin_lock_init(&gc->bgpio_lock);  in bgpio_init()
614 	gc->parent = dev;  in bgpio_init()
615 	gc->label = dev_name(dev);  in bgpio_init()
616 	gc->base = -1;  in bgpio_init()
617 	gc->ngpio = gc->bgpio_bits;  in bgpio_init()
618 	gc->request = bgpio_request;  in bgpio_init()
619 	gc->be_bits = !!(flags & BGPIOF_BIG_ENDIAN);  in bgpio_init()
621 	ret = bgpio_setup_io(gc, dat, set, clr, flags);  in bgpio_init()
633 	gc->bgpio_data = gc->read_reg(gc->reg_dat);  in bgpio_init()
634 	if (gc->set == bgpio_set_set &&  in bgpio_init()
636 		gc->bgpio_data = gc->read_reg(gc->reg_set);  in bgpio_init()
639 		gc->bgpio_dir_unreadable = true;  in bgpio_init()
644 	if ((gc->reg_dir_out || gc->reg_dir_in) &&  in bgpio_init()
646 		if (gc->reg_dir_out)  in bgpio_init()
647 			gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);  in bgpio_init()
648 		else if (gc->reg_dir_in)  in bgpio_init()
649 			gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);  in bgpio_init()
656 		if (gc->reg_dir_out && gc->reg_dir_in)  in bgpio_init()
657 			gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);  in bgpio_init()
679 		return IOMEM_ERR_PTR(-EINVAL);  in bgpio_map()
681 	return devm_ioremap_resource(&pdev->dev, r);  in bgpio_map()
686 	{ .compatible = "brcm,bcm6345-gpio" },
687 	{ .compatible = "wd,mbl-gpio" },
688 	{ .compatible = "ni,169445-nand-gpio" },
698 	if (!of_match_device(bgpio_of_match, &pdev->dev))  in bgpio_parse_dt()
701 	pdata = devm_kzalloc(&pdev->dev, sizeof(struct bgpio_pdata),  in bgpio_parse_dt()
704 		return ERR_PTR(-ENOMEM);  in bgpio_parse_dt()
706 	pdata->base = -1;  in bgpio_parse_dt()
708 	if (of_device_is_big_endian(pdev->dev.of_node))  in bgpio_parse_dt()
711 	if (of_property_read_bool(pdev->dev.of_node, "no-output"))  in bgpio_parse_dt()
726 	struct device *dev = &pdev->dev;  in bgpio_pdev_probe()
730 	void __iomem *clr;  in bgpio_pdev_probe()  local
745 		flags = pdev->id_entry->driver_data;  in bgpio_pdev_probe()
750 		return -EINVAL;  in bgpio_pdev_probe()
762 	clr = bgpio_map(pdev, "clr", sz);  in bgpio_pdev_probe()
763 	if (IS_ERR(clr))  in bgpio_pdev_probe()
764 		return PTR_ERR(clr);  in bgpio_pdev_probe()
774 	gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);  in bgpio_pdev_probe()
776 		return -ENOMEM;  in bgpio_pdev_probe()
778 	err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags);  in bgpio_pdev_probe()
783 		if (pdata->label)  in bgpio_pdev_probe()
784 			gc->label = pdata->label;  in bgpio_pdev_probe()
785 		gc->base = pdata->base;  in bgpio_pdev_probe()
786 		if (pdata->ngpio > 0)  in bgpio_pdev_probe()
787 			gc->ngpio = pdata->ngpio;  in bgpio_pdev_probe()
792 	return devm_gpiochip_add_data(&pdev->dev, gc, NULL);  in bgpio_pdev_probe()
797 		.name		= "basic-mmio-gpio",
800 		.name		= "basic-mmio-gpio-be",
809 		.name = "basic-mmio-gpio",
820 MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");