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/Linux-v6.1/Documentation/devicetree/bindings/fpga/
Dfpga-region.txt58 * FPGA Bridges gate bus signals between a host and FPGA.
59 * FPGA Bridges should be disabled while the FPGA is being programmed to
61 * FPGA bridges may be actual hardware or soft logic on an FPGA.
62 * During Full Reconfiguration, hardware bridges between the host and FPGA
67 buses, eliminating the need to show the hardware FPGA bridges in the
111 1. Disable appropriate FPGA bridges.
113 3. Enable the FPGA bridges.
118 will disable the bridges.
129 * FPGA Bridges
145 FPGA region will be the child of one of the hardware bridges (the bridge that
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Daltera-freeze-bridge.txt3 The Altera Freeze Bridge Controller manages one or more freeze bridges.
4 The controller can freeze/disable the bridges which prevents signal
6 unfreeze/enable the bridges which allows traffic to pass through the
Dxilinx-pr-decoupler.txt4 decouplers / fpga bridges.
5 The controller can decouple/disable the bridges which prevents signal
7 couple / enable the bridges which allows traffic to pass through the
/Linux-v6.1/drivers/pcmcia/
DKconfig63 bridge. Virtually all modern PCMCIA bridges do this, and most of
71 comment "PC-card bridges"
79 This option enables support for CardBus host bridges. Virtually
80 all modern PCMCIA bridges are CardBus compatible. A "bridge" is
91 bool "Special initialization for O2Micro bridges" if EXPERT
96 bool "Special initialization for Ricoh bridges" if EXPERT
101 bool "Special initialization for TI and EnE bridges" if EXPERT
106 bool "Auto-tune EnE bridges for CB cards" if EXPERT
111 bool "Special initialization for Toshiba ToPIC bridges" if EXPERT
136 Say Y here to include support for ISA-bus PCMCIA host bridges that
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/Linux-v6.1/drivers/gpu/drm/
Ddrm_bridge.c45 * either connected to it directly, or through a chain of bridges::
51 * Chaining multiple bridges to the output of a bridge, or the same bridge to
52 * the output of different bridges, is not supported.
68 * Bridges are responsible for linking themselves with the next bridge in the
72 * Once these links are created, the bridges can participate along with encoder
80 * bridges in the chain.
92 * Bridges also participate in implementing the &drm_connector at the end of
102 * The interaction between the bridges and other frameworks involved in
253 * Note that bridges attached to encoders are auto-detached during encoder
352 * - The encoder-related operations support control of the bridges in the
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Ddrm_bridge_connector.c24 * operations are fully implemented based on the operations of the bridges in
30 * connector with the chain of bridges passed to the function and registers it
35 * provided by the bridges in the chain. Each connector operation is delegated
39 * To make use of this helper, all bridges in the chain shall report bridge
42 * flag (none of the bridges shall create a DRM connector directly).
46 * struct drm_bridge_connector - A connector backed by a chain of bridges
56 * The encoder at the start of the bridges chain.
103 /* Notify all bridges in the pipeline of hotplug events. */ in drm_bridge_connector_hpd_notify()
307 /* No need for .mode_valid(), the bridges are checked by the core. */
315 * drm_bridge_connector_init - Initialise a connector for a chain of bridges
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/Linux-v6.1/include/drm/
Ddrm_bridge.h219 * of the bridges chain, for instance when the first bridge in the chain
221 * bridge in the chain and is likely irrelevant for the other bridges.
393 * otherwise. For bridges that don't subclass &drm_bridge_state, the
410 * For bridges that don't subclass &drm_bridge_state, the
464 * Bridge drivers that need to support being linked to bridges that are
522 * bridges that don't subclass &drm_bridge_state, the
531 * 2. It's meant to be used exclusively on bridges that have been
547 * Bridges that implement this callback shall set the
563 * displays such as many fixed panels. Bridges that support reading
567 * This callback is optional. Bridges that implement it shall set the
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/Linux-v6.1/Documentation/devicetree/bindings/display/bridge/
Dmegachips-stdpxxxx-ge-b850v3-fw.txt2 STDP4028-ge-b850v3-fw bridges (LVDS-DP)
3 STDP2690-ge-b850v3-fw bridges (DP-DP++)
11 STDP2690 behave as the stock bridges would. The compatible strings include the
12 suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
16 two bridges behaves as a single one. The only interfaces exposed by the
Dsimple-bridge.yaml7 title: Transparent non-programmable DRM bridges
14 This binding supports transparent non-programmable bridges that don't require
/Linux-v6.1/Documentation/driver-api/fpga/
Dfpga-region.rst12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
26 * which bridges to disable before programming and enable afterwards.
65 The FPGA region will need to specify which bridges to control while programming
66 the FPGA. The region driver can build a list of bridges during probe time
68 the list of bridges to program just before programming
76 * fpga_bridges_put() - Given a list of bridges, put them
Dfpga-programming.rst12 the FPGA manager and bridges. It will:
16 * build a list of FPGA bridges if a method has been specified to do so
17 * disable the bridges
19 * re-enable the bridges
31 bridges to control during programming or it has a pointer to a function that
Dintro.rst35 FPGA Bridges prevent spurious signals from going out of an FPGA or a
50 bridges as reconfigurable regions. A region may refer to the whole
/Linux-v6.1/drivers/fpga/
Dof-fpga-region.c72 * of_fpga_region_get_bridges - create a list of bridges
75 * Create a list of bridges including the parent bridge and the bridges
76 * specified by "fpga-bridges" property. Note that the
81 * done with the bridges.
83 * Return: 0 for success (even if there are no bridges specified)
84 * or -EBUSY if any of the bridges are in use.
106 /* If overlay has a list of bridges, use it. */ in of_fpga_region_get_bridges()
107 br = of_parse_phandle(info->overlay, "fpga-bridges", 0); in of_fpga_region_get_bridges()
116 br = of_parse_phandle(np, "fpga-bridges", i); in of_fpga_region_get_bridges()
131 /* If any of the bridges are in use, give up */ in of_fpga_region_get_bridges()
Dfpga-bridge.c19 /* Lock for adding/removing bridges to linked lists*/
155 * fpga_bridges_enable - enable bridges in a list
156 * @bridge_list: list of FPGA bridges
178 * fpga_bridges_disable - disable bridges in a list
180 * @bridge_list: list of FPGA bridges
202 * fpga_bridges_put - put bridges
204 * @bridge_list: list of FPGA bridges
229 * @bridge_list: list of FPGA bridges
259 * @bridge_list: list of FPGA bridges
Dfpga-region.c89 * bridges will be held if programming succeeds. This is intended to prevent
115 * In some cases, we already have a list of bridges in the in fpga_region_program_fpga()
116 * fpga region struct. Or we don't have any bridges. in fpga_region_program_fpga()
121 dev_err(dev, "failed to get fpga region bridges\n"); in fpga_region_program_fpga()
128 dev_err(dev, "failed to disable bridges\n"); in fpga_region_program_fpga()
140 dev_err(dev, "failed to enable region bridges\n"); in fpga_region_program_fpga()
249 * @get_bridges: optional function to get bridges to a list
DKconfig97 Say Y here if you want to support bridges connected between host
101 tristate "Altera SoCFPGA FPGA Bridges"
104 Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
111 Say Y to enable drivers for Altera FPGA Freeze bridges. A
138 and the FPGA Bridges associated with either a reconfigurable
/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dpci.txt1 PCI bus bridges have standardized Device Tree bindings:
18 host bridges in the system, otherwise potentially conflicting domain numbers
19 may be assigned to root buses behind different host bridges. The domain
68 When present, the port is external-facing. All bridges and endpoints
/Linux-v6.1/include/linux/fpga/
Dfpga-region.h17 * @get_bridges: optional function to get bridges to a list
35 * @bridge_list: list of FPGA bridges specified in region
40 * @get_bridges: optional function to get bridges to a list
/Linux-v6.1/Documentation/devicetree/bindings/ata/
Dcortina,gemini-sata-bridge.yaml14 takes two Faraday Technology FTIDE010 PATA controllers and bridges
26 description: phandles to the reset lines for both SATA bridges
55 bridges.
/Linux-v6.1/arch/alpha/kernel/
Dsys_eiger.c168 /* Find the number of backplane bridges. */ in eiger_swizzle()
173 case 0x00: bridge_count = 0; break; /* No bridges */ in eiger_swizzle()
182 /* Check for built-in bridges on hose 0. */ in eiger_swizzle()
192 /* Move up the chain of bridges. */ in eiger_swizzle()
/Linux-v6.1/drivers/ata/
Dpata_ftide010.c275 int bridges = 0; in pata_ftide010_gemini_port_start() local
286 bridges++; in pata_ftide010_gemini_port_start()
292 bridges++; in pata_ftide010_gemini_port_start()
299 bridges++; in pata_ftide010_gemini_port_start()
306 bridges++; in pata_ftide010_gemini_port_start()
309 dev_info(dev, "brought %d bridges online\n", bridges); in pata_ftide010_gemini_port_start()
310 return (bridges > 0) ? 0 : -EINVAL; // -ENODEV; in pata_ftide010_gemini_port_start()
/Linux-v6.1/Documentation/PCI/
Dmsi-howto.rst50 bridges). In order to ensure that all the data has arrived in memory,
239 Some PCI bridges are not able to route MSIs between busses properly.
242 Some bridges allow you to enable MSIs by changing some bits in their
259 Again, please notify linux-pci@vger.kernel.org of any bridges that need
280 Then, 'lspci -t' gives the list of bridges above a device. Reading
283 to bridges between the PCI root and the device, MSIs are disabled.
/Linux-v6.1/drivers/gpu/drm/bridge/
Dmegachips-stdpxxxx-ge-b850v3-fw.c11 * display bridge of the GE B850v3. There are two physical bridges on the video
13 * physical bridges are automatically configured by the input video signal, and
16 * STDP4028. The driver communicates with both bridges over i2c. The video
353 /* Only register after both bridges are probed */ in stdp4028_ge_b850v3_fw_probe()
401 /* Only register after both bridges are probed */ in stdp2690_ge_b850v3_fw_probe()
/Linux-v6.1/Documentation/driver-api/cxl/
Dmemory-devices.rst15 across host-bridges.
25 multiple Host Bridges and endpoints while another may opt for fault tolerance
39 module generates an emulated CXL topology of 2 Host Bridges each with 2 Root
254 Host Bridges, a PMEM interleave that targets a single Host Bridge, a Volatile
255 memory interleave that spans 2 Host Bridges, and a Volatile memory interleave
/Linux-v6.1/drivers/pci/
Dprobe.c483 * Some bridges set the base > limit by default, and some in pci_read_bridge_mmio_pref()
1062 * - PCI-to-PCI bridges in pci_bridge_child_ext_cfg_accessible()
1063 * - PCIe-to-PCI/PCI-X forward bridges in pci_bridge_child_ext_cfg_accessible()
1064 * - PCI/PCI-X-to-PCIe reverse bridges in pci_bridge_child_ext_cfg_accessible()
1231 * distributed equally between hotplug-capable bridges.
1232 * @pass: Either %0 (scan already configured bridges) or %1 (scan bridges
1236 * For CardBus bridges, we don't scan behind as the devices will
1239 * We need to process bridges in two passes -- first we scan those
1345 * configuration cycles on all bridges in in pci_scan_bridge_extend()
1348 * bridges programmed with overlapping bus in pci_scan_bridge_extend()
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