Home
last modified time | relevance | path

Searched +full:ast2400 +full:- +full:scu (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.10/Documentation/devicetree/bindings/misc/
Daspeed-p2a-ctrl.txt2 Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control Driver
14 - compatible: must be one of:
15 - "aspeed,ast2400-p2a-ctrl"
16 - "aspeed,ast2500-p2a-ctrl"
21 - reg: A hint for the memory regions associated with the P2A controller
22 - memory-region: A phandle to a reserved_memory region to be used for the PCI
25 The p2a-control node should be the child of a syscon node with the required
28 - compatible : Should be one of the following:
29 "aspeed,ast2400-scu", "syscon", "simple-mfd"
30 "aspeed,ast2500-scu", "syscon", "simple-mfd"
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Daspeed,ast2400-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2400-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED AST2400 Pin Controller
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2400-scu", "syscon", "simple-mfd"
24 const: aspeed,ast2400-pinctrl
27 A hint for the memory regions associated with the pin-controller
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Daspeed-scu.txt5 - compatible: One of:
6 "aspeed,ast2400-scu", "syscon", "simple-mfd"
7 "aspeed,ast2500-scu", "syscon", "simple-mfd"
9 - reg: contains the offset and length of the SCU memory region
10 - #clock-cells: should be set to <1> - the system controller is also a
12 - #reset-cells: should be set to <1> - the system controller is also a
18 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
20 #clock-cells = <1>;
21 #reset-cells = <1>;
/Linux-v5.10/drivers/gpu/drm/ast/
Dast_main.c14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
70 struct device_node *np = dev->pdev->dev.of_node; in ast_detect_config_mode()
75 ast->config_mode = ast_use_defaults; in ast_detect_config_mode()
78 /* Check if we have device-tree properties */ in ast_detect_config_mode()
79 if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", in ast_detect_config_mode()
82 ast->config_mode = ast_use_dt; in ast_detect_config_mode()
83 drm_info(dev, "Using device-tree for configuration\n"); in ast_detect_config_mode()
88 if (dev->pdev->device != PCI_CHIP_AST2000) in ast_detect_config_mode()
92 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge in ast_detect_config_mode()
103 ast->config_mode = ast_use_p2a; in ast_detect_config_mode()
[all …]
Dast_dp501.c1 // SPDX-License-Identifier: GPL-2.0
15 release_firmware(ast->dp501_fw); in ast_release_firmware()
16 ast->dp501_fw = NULL; in ast_release_firmware()
24 ret = request_firmware(&ast->dp501_fw, "ast_dp501_fw.bin", dev->dev); in ast_load_dp501_microcode()
28 return devm_add_action_or_reset(dev->dev, ast_release_firmware, ast); in ast_load_dp501_microcode()
213 if (ast->dp501_fw_addr) { in ast_launch_m68k()
214 fw_addr = ast->dp501_fw_addr; in ast_launch_m68k()
217 if (!ast->dp501_fw && in ast_launch_m68k()
221 fw_addr = (u8 *)ast->dp501_fw->data; in ast_launch_m68k()
222 len = ast->dp501_fw->size; in ast_launch_m68k()
[all …]
/Linux-v5.10/drivers/irqchip/
Dirq-aspeed-scu-ic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Aspeed AST24XX, AST25XX, and AST26XX SCU Interrupt Controller
41 struct regmap *scu; member
55 unsigned int mask = scu_ic->irq_enable << ASPEED_SCU_IC_STATUS_SHIFT; in aspeed_scu_ic_irq_handler()
60 * The SCU IC has just one register to control its operation and read in aspeed_scu_ic_irq_handler()
69 regmap_read(scu_ic->scu, scu_ic->reg, &sts); in aspeed_scu_ic_irq_handler()
70 enabled = sts & scu_ic->irq_enable; in aspeed_scu_ic_irq_handler()
73 bit = scu_ic->irq_shift; in aspeed_scu_ic_irq_handler()
74 max = scu_ic->num_irqs + bit; in aspeed_scu_ic_irq_handler()
77 irq = irq_find_mapping(scu_ic->irq_domain, in aspeed_scu_ic_irq_handler()
[all …]
/Linux-v5.10/drivers/clk/
Dclk-aspeed.c1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
[all …]
/Linux-v5.10/drivers/fsi/
Dfsi-master-ast-cf.c1 // SPDX-License-Identifier: GPL-2.0+
4 * A FSI master controller, using a simple GPIO bit-banging interface
25 #include "fsi-master.h"
26 #include "cf-fsi-fw.h"
28 #define FW_FILE_NAME "cf-fsi-fw.bin"
30 /* Common SCU based coprocessor control registers */
90 struct regmap *scu; member
132 msg->msg <<= bits; in msg_push_bits()
133 msg->msg |= data & ((1ull << bits) - 1); in msg_push_bits()
134 msg->bits += bits; in msg_push_bits()
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Daspeed-g4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2400";
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
51 compatible = "simple-bus";
[all …]
Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
52 compatible = "simple-bus";
[all …]
/Linux-v5.10/drivers/pinctrl/aspeed/
Dpinctrl-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include "pinctrl-aspeed.h"
17 return pdata->pinmux.ngroups; in aspeed_pinctrl_get_groups_count()
25 return pdata->pinmux.groups[group].name; in aspeed_pinctrl_get_group_name()
34 *pins = &pdata->pinmux.groups[group].pins[0]; in aspeed_pinctrl_get_group_pins()
35 *npins = pdata->pinmux.groups[group].npins; in aspeed_pinctrl_get_group_pins()
43 seq_printf(s, " %s", dev_name(pctldev->dev)); in aspeed_pinctrl_pin_dbg_show()
50 return pdata->pinmux.nfunctions; in aspeed_pinmux_get_fn_count()
58 return pdata->pinmux.functions[function].name; in aspeed_pinmux_get_fn_name()
68 *groups = pdata->pinmux.functions[function].groups; in aspeed_pinmux_get_fn_groups()
[all …]
Dpinmux-aspeed.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 * read-only).
24 * SoC Multi-function Pin Expression Examples
25 * ------------------------------------------
27 * Here are some sample mux configurations from the AST2400 and AST2500
35 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
37 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
39 * C5 is a multi-signal pin (high and low priority signals). Here we touch
42 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
44 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
[all …]
Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
43 #define HW_STRAP1 0x70 /* AST2400 strapping is 33 bits, is split */
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
47 #define SCU88 0x88 /* Multi-function Pin Control #3 */
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/serial/
D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: /schemas/serial.yaml#
14 - if:
16 - aspeed,sirq-polarity-sense
20 const: aspeed,ast2500-vuart
21 - if:
24 const: mrvl,mmp-uart
27 reg-shift:
[all …]
/Linux-v5.10/drivers/net/ethernet/faraday/
Dftgmac100.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
12 #include <linux/dma-mapping.h>
116 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
120 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
122 priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
134 return -EIO; in ftgmac100_reset_mac()
141 switch (priv->cur_speed) { in ftgmac100_reset_and_config_mac()
[all …]
/Linux-v5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
[all …]