Lines Matching +full:ast2400 +full:- +full:scu
1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include "pinctrl-aspeed.h"
17 return pdata->pinmux.ngroups; in aspeed_pinctrl_get_groups_count()
25 return pdata->pinmux.groups[group].name; in aspeed_pinctrl_get_group_name()
34 *pins = &pdata->pinmux.groups[group].pins[0]; in aspeed_pinctrl_get_group_pins()
35 *npins = pdata->pinmux.groups[group].npins; in aspeed_pinctrl_get_group_pins()
43 seq_printf(s, " %s", dev_name(pctldev->dev)); in aspeed_pinctrl_pin_dbg_show()
50 return pdata->pinmux.nfunctions; in aspeed_pinmux_get_fn_count()
58 return pdata->pinmux.functions[function].name; in aspeed_pinmux_get_fn_name()
68 *groups = pdata->pinmux.functions[function].groups; in aspeed_pinmux_get_fn_groups()
69 *num_groups = pdata->pinmux.functions[function].ngroups; in aspeed_pinmux_get_fn_groups()
79 pr_debug("Enabling signal %s for %s\n", expr->signal, in aspeed_sig_expr_enable()
80 expr->function); in aspeed_sig_expr_enable()
97 pr_debug("Disabling signal %s for %s\n", expr->signal, in aspeed_sig_expr_disable()
98 expr->function); in aspeed_sig_expr_disable()
149 if (strcmp((*exprs)->function, name) == 0) in aspeed_find_expr_by_name()
165 prios = pdesc->prios; in get_defined_attribute()
196 found[len - 2] = '\0'; in get_defined_attribute()
203 return expr->function; in aspeed_sig_expr_function()
213 return expr->signal; in aspeed_sig_expr_signal()
227 const struct aspeed_pin_group *pgroup = &pdata->pinmux.groups[group]; in aspeed_pinmux_set_mux()
229 &pdata->pinmux.functions[function]; in aspeed_pinmux_set_mux()
231 for (i = 0; i < pgroup->npins; i++) { in aspeed_pinmux_set_mux()
232 int pin = pgroup->pins[i]; in aspeed_pinmux_set_mux()
233 const struct aspeed_pin_desc *pdesc = pdata->pins[pin].drv_data; in aspeed_pinmux_set_mux()
238 pr_debug("Muxing pin %s for %s\n", pdesc->name, pfunc->name); in aspeed_pinmux_set_mux()
241 return -EINVAL; in aspeed_pinmux_set_mux()
243 prios = pdesc->prios; in aspeed_pinmux_set_mux()
250 expr = aspeed_find_expr_by_name(funcs, pfunc->name); in aspeed_pinmux_set_mux()
255 ret = aspeed_disable_sig(&pdata->pinmux, funcs); in aspeed_pinmux_set_mux()
267 pfunc->name, pdesc->name, pin, signals, in aspeed_pinmux_set_mux()
272 return -ENXIO; in aspeed_pinmux_set_mux()
275 ret = aspeed_sig_expr_enable(&pdata->pinmux, expr); in aspeed_pinmux_set_mux()
279 pr_debug("Muxed pin %s as %s for %s\n", pdesc->name, expr->signal, in aspeed_pinmux_set_mux()
280 expr->function); in aspeed_pinmux_set_mux()
289 * We need to differentiate between GPIO and non-GPIO signals to in aspeed_expr_is_gpio()
294 * Generally we have the following - A GPIO such as B1 has: in aspeed_expr_is_gpio()
296 * - expr->signal set to "GPIOB1" in aspeed_expr_is_gpio()
297 * - expr->function set to "GPIOB1" in aspeed_expr_is_gpio()
303 * However, some GPIOs are input-only, and the ASPEED datasheets name in aspeed_expr_is_gpio()
304 * them differently. An input-only GPIO such as T0 has: in aspeed_expr_is_gpio()
306 * - expr->signal set to "GPIT0" in aspeed_expr_is_gpio()
307 * - expr->function set to "GPIT0" in aspeed_expr_is_gpio()
313 * Some pins in the ASPEED BMC SoCs have a "pass-through" GPIO in aspeed_expr_is_gpio()
315 * output state of another (as if they were shorted together - a mux in aspeed_expr_is_gpio()
320 * separate, pin-specific GPIO. in aspeed_expr_is_gpio()
322 * Conceptually this pass-through mode is a form of GPIO and is named in aspeed_expr_is_gpio()
324 * trips us up with the simple GPI-prefixed-signal-name scheme in aspeed_expr_is_gpio()
325 * discussed above, as the pass-through configuration is not what we in aspeed_expr_is_gpio()
328 * On e.g. the AST2400, a pass-through function "GPID0" is grouped on in aspeed_expr_is_gpio()
332 * - expr->signal set to "GPID0IN" in aspeed_expr_is_gpio()
333 * - expr->function set to "GPID0" in aspeed_expr_is_gpio()
336 * - expr->signal set to "GPID0OUT" in aspeed_expr_is_gpio()
337 * - expr->function set to "GPID0" in aspeed_expr_is_gpio()
339 * By contrast, the pin-specific GPIO expressions for the same pins are in aspeed_expr_is_gpio()
343 * - expr->signal looks like "GPIOD0" in aspeed_expr_is_gpio()
344 * - expr->function looks like "GPIOD0" in aspeed_expr_is_gpio()
347 * - expr->signal looks like "GPIOD1" in aspeed_expr_is_gpio()
348 * - expr->function looks like "GPIOD1" in aspeed_expr_is_gpio()
351 * differentiate the pass-through GPIO pinmux configuration from the in aspeed_expr_is_gpio()
352 * pin-specific configuration that the GPIO subsystem is after: An in aspeed_expr_is_gpio()
353 * expression is a pin-specific (non-pass-through) GPIO configuration in aspeed_expr_is_gpio()
357 return !strncmp(expr->signal, "GPI", 3) && in aspeed_expr_is_gpio()
358 !strcmp(expr->signal, expr->function); in aspeed_expr_is_gpio()
381 const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data; in aspeed_gpio_request_enable()
385 return -EINVAL; in aspeed_gpio_request_enable()
387 prios = pdesc->prios; in aspeed_gpio_request_enable()
390 return -ENXIO; in aspeed_gpio_request_enable()
392 pr_debug("Muxing pin %s for GPIO\n", pdesc->name); in aspeed_gpio_request_enable()
399 ret = aspeed_disable_sig(&pdata->pinmux, funcs); in aspeed_gpio_request_enable()
410 pdesc->name, offset, signals); in aspeed_gpio_request_enable()
413 return -ENXIO; in aspeed_gpio_request_enable()
419 * Disabling all higher-priority expressions is enough to enable the in aspeed_gpio_request_enable()
420 * lowest-priority signal type. As such it has no associated in aspeed_gpio_request_enable()
424 pr_debug("Muxed pin %s as GPIO\n", pdesc->name); in aspeed_gpio_request_enable()
432 ret = aspeed_sig_expr_enable(&pdata->pinmux, expr); in aspeed_gpio_request_enable()
436 pr_debug("Muxed pin %s as %s\n", pdesc->name, expr->signal); in aspeed_gpio_request_enable()
448 parent = pdev->dev.parent; in aspeed_pinctrl_probe()
450 dev_err(&pdev->dev, "No parent for syscon pincontroller\n"); in aspeed_pinctrl_probe()
451 return -ENODEV; in aspeed_pinctrl_probe()
454 pdata->scu = syscon_node_to_regmap(parent->of_node); in aspeed_pinctrl_probe()
455 if (IS_ERR(pdata->scu)) { in aspeed_pinctrl_probe()
456 dev_err(&pdev->dev, "No regmap for syscon pincontroller parent\n"); in aspeed_pinctrl_probe()
457 return PTR_ERR(pdata->scu); in aspeed_pinctrl_probe()
460 pdata->pinmux.maps[ASPEED_IP_SCU] = pdata->scu; in aspeed_pinctrl_probe()
462 pctl = pinctrl_register(pdesc, &pdev->dev, pdata); in aspeed_pinctrl_probe()
465 dev_err(&pdev->dev, "Failed to register pinctrl\n"); in aspeed_pinctrl_probe()
477 return offset >= config->pins[0] && offset <= config->pins[1]; in pin_in_config_range()
487 for (i = 0; i < pdata->nconfigs; i++) { in find_pinconf_config()
488 if (param == pdata->configs[i].param && in find_pinconf_config()
489 pin_in_config_range(offset, &pdata->configs[i])) in find_pinconf_config()
490 return &pdata->configs[i]; in find_pinconf_config()
506 for (i = 0; i < pdata->nconfmaps; i++) { in find_pinconf_map()
510 elem = &pdata->confmaps[i]; in find_pinconf_map()
514 match = (elem->arg == -1 || elem->arg == value); in find_pinconf_map()
517 match = (elem->val == value); in find_pinconf_map()
521 if (param == elem->param && match) in find_pinconf_map()
542 return -ENOTSUPP; in aspeed_pin_config_get()
544 rc = regmap_read(pdata->scu, pconf->reg, &val); in aspeed_pin_config_get()
549 (val & pconf->mask) >> __ffs(pconf->mask)); in aspeed_pin_config_get()
552 return -EINVAL; in aspeed_pin_config_get()
555 arg = (u32) pmap->arg; in aspeed_pin_config_get()
557 arg = !!pmap->arg; in aspeed_pin_config_get()
562 return -EINVAL; in aspeed_pin_config_get()
590 return -ENOTSUPP; in aspeed_pin_config_set()
595 return -EINVAL; in aspeed_pin_config_set()
597 val = pmap->val << __ffs(pconf->mask); in aspeed_pin_config_set()
599 rc = regmap_update_bits(pdata->scu, pconf->reg, in aspeed_pin_config_set()
600 pconf->mask, val); in aspeed_pin_config_set()
605 pr_debug("%s: Set SCU%02X[0x%08X]=0x%X for param %d(=%d) on pin %d\n", in aspeed_pin_config_set()
606 __func__, pconf->reg, pconf->mask, in aspeed_pin_config_set()
626 return -ENODEV; in aspeed_pin_config_group_get()