Lines Matching +full:ast2400 +full:- +full:scu
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
12 #include <linux/dma-mapping.h>
116 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
120 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
122 priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
134 return -EIO; in ftgmac100_reset_mac()
141 switch (priv->cur_speed) { in ftgmac100_reset_and_config_mac()
154 netdev_err(priv->netdev, "Unknown speed %d !\n", in ftgmac100_reset_and_config_mac()
155 priv->cur_speed); in ftgmac100_reset_and_config_mac()
160 priv->rx_pointer = 0; in ftgmac100_reset_and_config_mac()
161 priv->tx_clean_pointer = 0; in ftgmac100_reset_and_config_mac()
162 priv->tx_pointer = 0; in ftgmac100_reset_and_config_mac()
166 return -EIO; in ftgmac100_reset_and_config_mac()
176 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR); in ftgmac100_write_mac_addr()
177 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR); in ftgmac100_write_mac_addr()
187 addr = device_get_mac_address(priv->dev, mac, ETH_ALEN); in ftgmac100_initial_mac()
189 ether_addr_copy(priv->netdev->dev_addr, mac); in ftgmac100_initial_mac()
190 dev_info(priv->dev, "Read MAC address %pM from device tree\n", in ftgmac100_initial_mac()
195 m = ioread32(priv->base + FTGMAC100_OFFSET_MAC_MADR); in ftgmac100_initial_mac()
196 l = ioread32(priv->base + FTGMAC100_OFFSET_MAC_LADR); in ftgmac100_initial_mac()
206 ether_addr_copy(priv->netdev->dev_addr, mac); in ftgmac100_initial_mac()
207 dev_info(priv->dev, "Read MAC address %pM from chip\n", mac); in ftgmac100_initial_mac()
209 eth_hw_addr_random(priv->netdev); in ftgmac100_initial_mac()
210 dev_info(priv->dev, "Generated random MAC address %pM\n", in ftgmac100_initial_mac()
211 priv->netdev->dev_addr); in ftgmac100_initial_mac()
224 ftgmac100_write_mac_addr(netdev_priv(dev), dev->dev_addr); in ftgmac100_set_mac_addr()
234 if (priv->rx_pause) in ftgmac100_config_pause()
240 if (priv->tx_pause) in ftgmac100_config_pause()
243 iowrite32(fcr, priv->base + FTGMAC100_OFFSET_FCR); in ftgmac100_config_pause()
251 reg = ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_init_hw()
252 iowrite32(reg, priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_init_hw()
255 iowrite32(priv->rxdes_dma, priv->base + FTGMAC100_OFFSET_RXR_BADR); in ftgmac100_init_hw()
258 iowrite32(priv->txdes_dma, priv->base + FTGMAC100_OFFSET_NPTXR_BADR); in ftgmac100_init_hw()
262 priv->base + FTGMAC100_OFFSET_RBSR); in ftgmac100_init_hw()
266 priv->base + FTGMAC100_OFFSET_APTC); in ftgmac100_init_hw()
269 ftgmac100_write_mac_addr(priv, priv->netdev->dev_addr); in ftgmac100_init_hw()
272 iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0); in ftgmac100_init_hw()
273 iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1); in ftgmac100_init_hw()
278 * AST2400 specification. in ftgmac100_init_hw()
287 priv->base + FTGMAC100_OFFSET_DBLAC); in ftgmac100_init_hw()
295 priv->base + FTGMAC100_OFFSET_ITC); in ftgmac100_init_hw()
298 reg = ioread32(priv->base + FTGMAC100_OFFSET_FEAR); in ftgmac100_init_hw()
301 reg = ioread32(priv->base + FTGMAC100_OFFSET_TPAFCR); in ftgmac100_init_hw()
305 iowrite32(reg, priv->base + FTGMAC100_OFFSET_TPAFCR); in ftgmac100_init_hw()
310 u32 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_start_hw()
326 if (priv->cur_duplex == DUPLEX_FULL) in ftgmac100_start_hw()
328 if (priv->netdev->flags & IFF_PROMISC) in ftgmac100_start_hw()
330 if (priv->netdev->flags & IFF_ALLMULTI) in ftgmac100_start_hw()
332 else if (netdev_mc_count(priv->netdev)) in ftgmac100_start_hw()
336 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) in ftgmac100_start_hw()
340 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_start_hw()
345 iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_stop_hw()
352 priv->maht1 = 0; in ftgmac100_calc_mc_hash()
353 priv->maht0 = 0; in ftgmac100_calc_mc_hash()
354 netdev_for_each_mc_addr(ha, priv->netdev) { in ftgmac100_calc_mc_hash()
355 u32 crc_val = ether_crc_le(ETH_ALEN, ha->addr); in ftgmac100_calc_mc_hash()
359 priv->maht1 |= 1ul << (crc_val - 32); in ftgmac100_calc_mc_hash()
361 priv->maht0 |= 1ul << (crc_val); in ftgmac100_calc_mc_hash()
377 iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0); in ftgmac100_set_rx_mode()
378 iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1); in ftgmac100_set_rx_mode()
387 struct net_device *netdev = priv->netdev; in ftgmac100_alloc_rx_buf()
396 err = -ENOMEM; in ftgmac100_alloc_rx_buf()
397 map = priv->rx_scratch_dma; in ftgmac100_alloc_rx_buf()
399 map = dma_map_single(priv->dev, skb->data, RX_BUF_SIZE, in ftgmac100_alloc_rx_buf()
401 if (unlikely(dma_mapping_error(priv->dev, map))) { in ftgmac100_alloc_rx_buf()
405 map = priv->rx_scratch_dma; in ftgmac100_alloc_rx_buf()
407 err = -ENOMEM; in ftgmac100_alloc_rx_buf()
412 priv->rx_skbs[entry] = skb; in ftgmac100_alloc_rx_buf()
415 rxdes->rxdes3 = cpu_to_le32(map); in ftgmac100_alloc_rx_buf()
421 if (entry == (priv->rx_q_entries - 1)) in ftgmac100_alloc_rx_buf()
422 rxdes->rxdes0 = cpu_to_le32(priv->rxdes0_edorr_mask); in ftgmac100_alloc_rx_buf()
424 rxdes->rxdes0 = 0; in ftgmac100_alloc_rx_buf()
432 return (pointer + 1) & (priv->rx_q_entries - 1); in ftgmac100_next_rx_pointer()
437 struct net_device *netdev = priv->netdev; in ftgmac100_rx_packet_error()
440 netdev->stats.rx_errors++; in ftgmac100_rx_packet_error()
443 netdev->stats.rx_crc_errors++; in ftgmac100_rx_packet_error()
448 netdev->stats.rx_length_errors++; in ftgmac100_rx_packet_error()
453 struct net_device *netdev = priv->netdev; in ftgmac100_rx_packet()
461 pointer = priv->rx_pointer; in ftgmac100_rx_packet()
462 rxdes = &priv->rxdes[pointer]; in ftgmac100_rx_packet()
465 status = le32_to_cpu(rxdes->rxdes0); in ftgmac100_rx_packet()
481 csum_vlan = le32_to_cpu(rxdes->rxdes1); in ftgmac100_rx_packet()
505 skb = priv->rx_skbs[pointer]; in ftgmac100_rx_packet()
512 netdev->stats.multicast++; in ftgmac100_rx_packet()
520 if (netdev->features & NETIF_F_RXCSUM) { in ftgmac100_rx_packet()
526 skb->ip_summed = CHECKSUM_NONE; in ftgmac100_rx_packet()
528 skb->ip_summed = CHECKSUM_UNNECESSARY; in ftgmac100_rx_packet()
535 if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) && in ftgmac100_rx_packet()
541 map = le32_to_cpu(rxdes->rxdes3); in ftgmac100_rx_packet()
548 dma_unmap_single(priv->dev, map, size, DMA_FROM_DEVICE); in ftgmac100_rx_packet()
550 dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); in ftgmac100_rx_packet()
556 priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer); in ftgmac100_rx_packet()
558 skb->protocol = eth_type_trans(skb, netdev); in ftgmac100_rx_packet()
560 netdev->stats.rx_packets++; in ftgmac100_rx_packet()
561 netdev->stats.rx_bytes += size; in ftgmac100_rx_packet()
564 if (skb->ip_summed == CHECKSUM_NONE) in ftgmac100_rx_packet()
567 napi_gro_receive(&priv->napi, skb); in ftgmac100_rx_packet()
574 rxdes->rxdes0 = cpu_to_le32(status & priv->rxdes0_edorr_mask); in ftgmac100_rx_packet()
575 priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer); in ftgmac100_rx_packet()
576 netdev->stats.rx_dropped++; in ftgmac100_rx_packet()
583 if (index == (priv->tx_q_entries - 1)) in ftgmac100_base_tx_ctlstat()
584 return priv->txdes0_edotr_mask; in ftgmac100_base_tx_ctlstat()
592 return (pointer + 1) & (priv->tx_q_entries - 1); in ftgmac100_next_tx_pointer()
603 return (priv->tx_clean_pointer - priv->tx_pointer - 1) & in ftgmac100_tx_buf_avail()
604 (priv->tx_q_entries - 1); in ftgmac100_tx_buf_avail()
609 return priv->tx_pointer != priv->tx_clean_pointer; in ftgmac100_tx_buf_cleanable()
618 dma_addr_t map = le32_to_cpu(txdes->txdes3); in ftgmac100_free_tx_packet()
623 dma_unmap_single(priv->dev, map, len, DMA_TO_DEVICE); in ftgmac100_free_tx_packet()
626 dma_unmap_page(priv->dev, map, len, DMA_TO_DEVICE); in ftgmac100_free_tx_packet()
632 priv->tx_skbs[pointer] = NULL; in ftgmac100_free_tx_packet()
637 struct net_device *netdev = priv->netdev; in ftgmac100_tx_complete_packet()
643 pointer = priv->tx_clean_pointer; in ftgmac100_tx_complete_packet()
644 txdes = &priv->txdes[pointer]; in ftgmac100_tx_complete_packet()
646 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_tx_complete_packet()
650 skb = priv->tx_skbs[pointer]; in ftgmac100_tx_complete_packet()
651 netdev->stats.tx_packets++; in ftgmac100_tx_complete_packet()
652 netdev->stats.tx_bytes += skb->len; in ftgmac100_tx_complete_packet()
654 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_tx_complete_packet()
656 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv, pointer); in ftgmac100_tx_complete_packet()
663 struct net_device *netdev = priv->netdev; in ftgmac100_tx_complete()
687 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { in ftgmac100_prep_tx_csum()
688 u8 ip_proto = ip_hdr(skb)->protocol; in ftgmac100_prep_tx_csum()
716 netdev->stats.tx_dropped++; in ftgmac100_hard_start_xmit()
721 if (unlikely(skb->len > MAX_PKT_SIZE)) { in ftgmac100_hard_start_xmit()
730 nfrags = skb_shinfo(skb)->nr_frags; in ftgmac100_hard_start_xmit()
734 if (skb->ip_summed == CHECKSUM_PARTIAL && in ftgmac100_hard_start_xmit()
748 map = dma_map_single(priv->dev, skb->data, len, DMA_TO_DEVICE); in ftgmac100_hard_start_xmit()
749 if (dma_mapping_error(priv->dev, map)) { in ftgmac100_hard_start_xmit()
756 pointer = priv->tx_pointer; in ftgmac100_hard_start_xmit()
757 txdes = first = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
762 priv->tx_skbs[pointer] = skb; in ftgmac100_hard_start_xmit()
769 txdes->txdes3 = cpu_to_le32(map); in ftgmac100_hard_start_xmit()
770 txdes->txdes1 = cpu_to_le32(csum_vlan); in ftgmac100_hard_start_xmit()
777 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in ftgmac100_hard_start_xmit()
782 map = skb_frag_dma_map(priv->dev, frag, 0, len, in ftgmac100_hard_start_xmit()
784 if (dma_mapping_error(priv->dev, map)) in ftgmac100_hard_start_xmit()
788 priv->tx_skbs[pointer] = skb; in ftgmac100_hard_start_xmit()
789 txdes = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
793 if (i == (nfrags - 1)) in ftgmac100_hard_start_xmit()
795 txdes->txdes0 = cpu_to_le32(ctl_stat); in ftgmac100_hard_start_xmit()
796 txdes->txdes1 = 0; in ftgmac100_hard_start_xmit()
797 txdes->txdes3 = cpu_to_le32(map); in ftgmac100_hard_start_xmit()
807 first->txdes0 = cpu_to_le32(f_ctl_stat); in ftgmac100_hard_start_xmit()
810 priv->tx_pointer = pointer; in ftgmac100_hard_start_xmit()
825 iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD); in ftgmac100_hard_start_xmit()
834 pointer = priv->tx_pointer; in ftgmac100_hard_start_xmit()
836 first->txdes0 = cpu_to_le32(f_ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()
841 txdes = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
842 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_hard_start_xmit()
844 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()
854 netdev->stats.tx_dropped++; in ftgmac100_hard_start_xmit()
864 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_free_buffers()
865 struct ftgmac100_rxdes *rxdes = &priv->rxdes[i]; in ftgmac100_free_buffers()
866 struct sk_buff *skb = priv->rx_skbs[i]; in ftgmac100_free_buffers()
867 dma_addr_t map = le32_to_cpu(rxdes->rxdes3); in ftgmac100_free_buffers()
872 priv->rx_skbs[i] = NULL; in ftgmac100_free_buffers()
873 dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); in ftgmac100_free_buffers()
878 for (i = 0; i < priv->tx_q_entries; i++) { in ftgmac100_free_buffers()
879 struct ftgmac100_txdes *txdes = &priv->txdes[i]; in ftgmac100_free_buffers()
880 struct sk_buff *skb = priv->tx_skbs[i]; in ftgmac100_free_buffers()
885 le32_to_cpu(txdes->txdes0)); in ftgmac100_free_buffers()
892 kfree(priv->rx_skbs); in ftgmac100_free_rings()
893 kfree(priv->tx_skbs); in ftgmac100_free_rings()
896 if (priv->rxdes) in ftgmac100_free_rings()
897 dma_free_coherent(priv->dev, MAX_RX_QUEUE_ENTRIES * in ftgmac100_free_rings()
899 priv->rxdes, priv->rxdes_dma); in ftgmac100_free_rings()
900 priv->rxdes = NULL; in ftgmac100_free_rings()
902 if (priv->txdes) in ftgmac100_free_rings()
903 dma_free_coherent(priv->dev, MAX_TX_QUEUE_ENTRIES * in ftgmac100_free_rings()
905 priv->txdes, priv->txdes_dma); in ftgmac100_free_rings()
906 priv->txdes = NULL; in ftgmac100_free_rings()
909 if (priv->rx_scratch) in ftgmac100_free_rings()
910 dma_free_coherent(priv->dev, RX_BUF_SIZE, in ftgmac100_free_rings()
911 priv->rx_scratch, priv->rx_scratch_dma); in ftgmac100_free_rings()
917 priv->rx_skbs = kcalloc(MAX_RX_QUEUE_ENTRIES, sizeof(void *), in ftgmac100_alloc_rings()
919 if (!priv->rx_skbs) in ftgmac100_alloc_rings()
920 return -ENOMEM; in ftgmac100_alloc_rings()
921 priv->tx_skbs = kcalloc(MAX_TX_QUEUE_ENTRIES, sizeof(void *), in ftgmac100_alloc_rings()
923 if (!priv->tx_skbs) in ftgmac100_alloc_rings()
924 return -ENOMEM; in ftgmac100_alloc_rings()
927 priv->rxdes = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
929 &priv->rxdes_dma, GFP_KERNEL); in ftgmac100_alloc_rings()
930 if (!priv->rxdes) in ftgmac100_alloc_rings()
931 return -ENOMEM; in ftgmac100_alloc_rings()
932 priv->txdes = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
934 &priv->txdes_dma, GFP_KERNEL); in ftgmac100_alloc_rings()
935 if (!priv->txdes) in ftgmac100_alloc_rings()
936 return -ENOMEM; in ftgmac100_alloc_rings()
939 priv->rx_scratch = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
941 &priv->rx_scratch_dma, in ftgmac100_alloc_rings()
943 if (!priv->rx_scratch) in ftgmac100_alloc_rings()
944 return -ENOMEM; in ftgmac100_alloc_rings()
956 priv->rx_q_entries = priv->new_rx_q_entries; in ftgmac100_init_rings()
957 priv->tx_q_entries = priv->new_tx_q_entries; in ftgmac100_init_rings()
959 if (WARN_ON(priv->rx_q_entries < MIN_RX_QUEUE_ENTRIES)) in ftgmac100_init_rings()
963 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_init_rings()
964 rxdes = &priv->rxdes[i]; in ftgmac100_init_rings()
965 rxdes->rxdes0 = 0; in ftgmac100_init_rings()
966 rxdes->rxdes3 = cpu_to_le32(priv->rx_scratch_dma); in ftgmac100_init_rings()
969 rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask); in ftgmac100_init_rings()
971 if (WARN_ON(priv->tx_q_entries < MIN_RX_QUEUE_ENTRIES)) in ftgmac100_init_rings()
975 for (i = 0; i < priv->tx_q_entries; i++) { in ftgmac100_init_rings()
976 txdes = &priv->txdes[i]; in ftgmac100_init_rings()
977 txdes->txdes0 = 0; in ftgmac100_init_rings()
979 txdes->txdes0 |= cpu_to_le32(priv->txdes0_edotr_mask); in ftgmac100_init_rings()
986 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_alloc_rx_buffers()
987 struct ftgmac100_rxdes *rxdes = &priv->rxdes[i]; in ftgmac100_alloc_rx_buffers()
990 return -ENOMEM; in ftgmac100_alloc_rx_buffers()
998 struct phy_device *phydev = netdev->phydev; in ftgmac100_adjust_link()
1003 if (!phydev->link) in ftgmac100_adjust_link()
1006 new_speed = phydev->speed; in ftgmac100_adjust_link()
1009 if (priv->aneg_pause) { in ftgmac100_adjust_link()
1010 rx_pause = tx_pause = phydev->pause; in ftgmac100_adjust_link()
1011 if (phydev->asym_pause) in ftgmac100_adjust_link()
1014 rx_pause = priv->rx_pause; in ftgmac100_adjust_link()
1015 tx_pause = priv->tx_pause; in ftgmac100_adjust_link()
1019 if (phydev->speed == priv->cur_speed && in ftgmac100_adjust_link()
1020 phydev->duplex == priv->cur_duplex && in ftgmac100_adjust_link()
1021 rx_pause == priv->rx_pause && in ftgmac100_adjust_link()
1022 tx_pause == priv->tx_pause) in ftgmac100_adjust_link()
1028 if (new_speed || priv->cur_speed) in ftgmac100_adjust_link()
1031 priv->cur_speed = new_speed; in ftgmac100_adjust_link()
1032 priv->cur_duplex = phydev->duplex; in ftgmac100_adjust_link()
1033 priv->rx_pause = rx_pause; in ftgmac100_adjust_link()
1034 priv->tx_pause = tx_pause; in ftgmac100_adjust_link()
1041 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_adjust_link()
1044 schedule_work(&priv->reset_task); in ftgmac100_adjust_link()
1049 struct net_device *netdev = priv->netdev; in ftgmac100_mii_probe()
1052 phydev = phy_find_first(priv->mii_bus); in ftgmac100_mii_probe()
1054 netdev_info(netdev, "%s: no PHY found\n", netdev->name); in ftgmac100_mii_probe()
1055 return -ENODEV; in ftgmac100_mii_probe()
1062 netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name); in ftgmac100_mii_probe()
1079 struct net_device *netdev = bus->priv; in ftgmac100_mdiobus_read()
1084 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1093 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1096 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1101 data = ioread32(priv->base + FTGMAC100_OFFSET_PHYDATA); in ftgmac100_mdiobus_read()
1109 return -EIO; in ftgmac100_mdiobus_read()
1115 struct net_device *netdev = bus->priv; in ftgmac100_mdiobus_write()
1121 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1132 iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA); in ftgmac100_mdiobus_write()
1133 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1136 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1145 return -EIO; in ftgmac100_mdiobus_write()
1151 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); in ftgmac100_get_drvinfo()
1152 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info)); in ftgmac100_get_drvinfo()
1161 ering->rx_max_pending = MAX_RX_QUEUE_ENTRIES; in ftgmac100_get_ringparam()
1162 ering->tx_max_pending = MAX_TX_QUEUE_ENTRIES; in ftgmac100_get_ringparam()
1163 ering->rx_pending = priv->rx_q_entries; in ftgmac100_get_ringparam()
1164 ering->tx_pending = priv->tx_q_entries; in ftgmac100_get_ringparam()
1172 if (ering->rx_pending > MAX_RX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1173 ering->tx_pending > MAX_TX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1174 ering->rx_pending < MIN_RX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1175 ering->tx_pending < MIN_TX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1176 !is_power_of_2(ering->rx_pending) || in ftgmac100_set_ringparam()
1177 !is_power_of_2(ering->tx_pending)) in ftgmac100_set_ringparam()
1178 return -EINVAL; in ftgmac100_set_ringparam()
1180 priv->new_rx_q_entries = ering->rx_pending; in ftgmac100_set_ringparam()
1181 priv->new_tx_q_entries = ering->tx_pending; in ftgmac100_set_ringparam()
1183 schedule_work(&priv->reset_task); in ftgmac100_set_ringparam()
1193 pause->autoneg = priv->aneg_pause; in ftgmac100_get_pauseparam()
1194 pause->tx_pause = priv->tx_pause; in ftgmac100_get_pauseparam()
1195 pause->rx_pause = priv->rx_pause; in ftgmac100_get_pauseparam()
1202 struct phy_device *phydev = netdev->phydev; in ftgmac100_set_pauseparam()
1204 priv->aneg_pause = pause->autoneg; in ftgmac100_set_pauseparam()
1205 priv->tx_pause = pause->tx_pause; in ftgmac100_set_pauseparam()
1206 priv->rx_pause = pause->rx_pause; in ftgmac100_set_pauseparam()
1209 phy_set_asym_pause(phydev, pause->rx_pause, pause->tx_pause); in ftgmac100_set_pauseparam()
1212 if (!(phydev && priv->aneg_pause)) in ftgmac100_set_pauseparam()
1238 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_interrupt()
1239 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_interrupt()
1244 netdev->stats.rx_over_errors++; in ftgmac100_interrupt()
1248 netdev->stats.rx_fifo_errors++; in ftgmac100_interrupt()
1252 netdev->stats.tx_fifo_errors++; in ftgmac100_interrupt()
1254 /* AHB error -> Reset the chip */ in ftgmac100_interrupt()
1259 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_interrupt()
1260 schedule_work(&priv->reset_task); in ftgmac100_interrupt()
1267 priv->need_mac_restart = true; in ftgmac100_interrupt()
1274 iowrite32(new_mask, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_interrupt()
1277 napi_schedule_irqoff(&priv->napi); in ftgmac100_interrupt()
1284 struct ftgmac100_rxdes *rxdes = &priv->rxdes[priv->rx_pointer]; in ftgmac100_check_rx()
1287 return !!(rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY)); in ftgmac100_check_rx()
1309 if (unlikely(priv->need_mac_restart)) { in ftgmac100_poll()
1312 /* Re-enable "bad" interrupts */ in ftgmac100_poll()
1314 priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_poll()
1324 /* We are about to re-enable all interrupts. However in ftgmac100_poll()
1327 * to re-check if there's something to process in ftgmac100_poll()
1330 priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_poll()
1335 ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_poll()
1347 priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_poll()
1357 /* Re-init descriptors (adjust queue sizes) */ in ftgmac100_init_all()
1370 /* Re-enable the device */ in ftgmac100_init_all()
1371 napi_enable(&priv->napi); in ftgmac100_init_all()
1372 netif_start_queue(priv->netdev); in ftgmac100_init_all()
1375 iowrite32(FTGMAC100_INT_ALL, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_init_all()
1384 struct net_device *netdev = priv->netdev; in ftgmac100_reset_task()
1391 if (netdev->phydev) in ftgmac100_reset_task()
1392 mutex_lock(&netdev->phydev->lock); in ftgmac100_reset_task()
1393 if (priv->mii_bus) in ftgmac100_reset_task()
1394 mutex_lock(&priv->mii_bus->mdio_lock); in ftgmac100_reset_task()
1403 napi_disable(&priv->napi); in ftgmac100_reset_task()
1422 if (priv->mii_bus) in ftgmac100_reset_task()
1423 mutex_unlock(&priv->mii_bus->mdio_lock); in ftgmac100_reset_task()
1424 if (netdev->phydev) in ftgmac100_reset_task()
1425 mutex_unlock(&netdev->phydev->lock); in ftgmac100_reset_task()
1441 /* When using NC-SI we force the speed to 100Mbit/s full duplex, in ftgmac100_open()
1447 if (priv->use_ncsi) { in ftgmac100_open()
1448 priv->cur_duplex = DUPLEX_FULL; in ftgmac100_open()
1449 priv->cur_speed = SPEED_100; in ftgmac100_open()
1451 priv->cur_duplex = 0; in ftgmac100_open()
1452 priv->cur_speed = 0; in ftgmac100_open()
1461 netif_napi_add(netdev, &priv->napi, ftgmac100_poll, 64); in ftgmac100_open()
1464 err = request_irq(netdev->irq, ftgmac100_interrupt, 0, netdev->name, netdev); in ftgmac100_open()
1466 netdev_err(netdev, "failed to request irq %d\n", netdev->irq); in ftgmac100_open()
1477 if (netdev->phydev) { in ftgmac100_open()
1479 phy_start(netdev->phydev); in ftgmac100_open()
1480 } else if (priv->use_ncsi) { in ftgmac100_open()
1481 /* If using NC-SI, set our carrier on and start the stack */ in ftgmac100_open()
1485 err = ncsi_start_dev(priv->ndev); in ftgmac100_open()
1493 napi_disable(&priv->napi); in ftgmac100_open()
1497 free_irq(netdev->irq, netdev); in ftgmac100_open()
1499 netif_napi_del(&priv->napi); in ftgmac100_open()
1501 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_open()
1519 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_stop()
1522 napi_disable(&priv->napi); in ftgmac100_stop()
1523 netif_napi_del(&priv->napi); in ftgmac100_stop()
1524 if (netdev->phydev) in ftgmac100_stop()
1525 phy_stop(netdev->phydev); in ftgmac100_stop()
1526 else if (priv->use_ncsi) in ftgmac100_stop()
1527 ncsi_stop_dev(priv->ndev); in ftgmac100_stop()
1530 free_irq(netdev->irq, netdev); in ftgmac100_stop()
1542 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_tx_timeout()
1545 schedule_work(&priv->reset_task); in ftgmac100_tx_timeout()
1552 netdev_features_t changed = netdev->features ^ features; in ftgmac100_set_features()
1561 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_set_features()
1562 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) in ftgmac100_set_features()
1566 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_set_features()
1578 ftgmac100_interrupt(netdev->irq, netdev); in ftgmac100_poll_controller()
1603 struct platform_device *pdev = to_platform_device(priv->dev); in ftgmac100_setup_mdio()
1605 struct device_node *np = pdev->dev.of_node; in ftgmac100_setup_mdio()
1610 priv->mii_bus = mdiobus_alloc(); in ftgmac100_setup_mdio()
1611 if (!priv->mii_bus) in ftgmac100_setup_mdio()
1612 return -EIO; in ftgmac100_setup_mdio()
1614 if (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_setup_mdio()
1615 of_device_is_compatible(np, "aspeed,ast2500-mac")) { in ftgmac100_setup_mdio()
1618 /* For the AST2400 and AST2500 this driver only supports the in ftgmac100_setup_mdio()
1621 reg = ioread32(priv->base + FTGMAC100_OFFSET_REVR); in ftgmac100_setup_mdio()
1623 iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR); in ftgmac100_setup_mdio()
1626 /* Get PHY mode from device-tree */ in ftgmac100_setup_mdio()
1639 * On the Aspeed SoC there are additionally straps and SCU in ftgmac100_setup_mdio()
1643 * those SoC specific bits and assume the device-tree is in ftgmac100_setup_mdio()
1644 * right and the SCU has been configured properly by pinmux in ftgmac100_setup_mdio()
1647 if (priv->is_aspeed && in ftgmac100_setup_mdio()
1659 priv->mii_bus->name = "ftgmac100_mdio"; in ftgmac100_setup_mdio()
1660 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d", in ftgmac100_setup_mdio()
1661 pdev->name, pdev->id); in ftgmac100_setup_mdio()
1662 priv->mii_bus->parent = priv->dev; in ftgmac100_setup_mdio()
1663 priv->mii_bus->priv = priv->netdev; in ftgmac100_setup_mdio()
1664 priv->mii_bus->read = ftgmac100_mdiobus_read; in ftgmac100_setup_mdio()
1665 priv->mii_bus->write = ftgmac100_mdiobus_write; in ftgmac100_setup_mdio()
1668 priv->mii_bus->irq[i] = PHY_POLL; in ftgmac100_setup_mdio()
1670 err = mdiobus_register(priv->mii_bus); in ftgmac100_setup_mdio()
1672 dev_err(priv->dev, "Cannot register MDIO bus!\n"); in ftgmac100_setup_mdio()
1678 dev_err(priv->dev, "MII Probe failed!\n"); in ftgmac100_setup_mdio()
1685 mdiobus_unregister(priv->mii_bus); in ftgmac100_setup_mdio()
1687 mdiobus_free(priv->mii_bus); in ftgmac100_setup_mdio()
1695 if (!netdev->phydev) in ftgmac100_destroy_mdio()
1698 phy_disconnect(netdev->phydev); in ftgmac100_destroy_mdio()
1699 mdiobus_unregister(priv->mii_bus); in ftgmac100_destroy_mdio()
1700 mdiobus_free(priv->mii_bus); in ftgmac100_destroy_mdio()
1705 if (unlikely(nd->state != ncsi_dev_state_functional)) in ftgmac100_ncsi_handler()
1708 netdev_dbg(nd->dev, "NCSI interface %s\n", in ftgmac100_ncsi_handler()
1709 nd->link_up ? "up" : "down"); in ftgmac100_ncsi_handler()
1717 clk = devm_clk_get(priv->dev, NULL /* MACCLK */); in ftgmac100_setup_clk()
1720 priv->clk = clk; in ftgmac100_setup_clk()
1721 rc = clk_prepare_enable(priv->clk); in ftgmac100_setup_clk()
1729 rc = clk_set_rate(priv->clk, priv->use_ncsi ? FTGMAC_25MHZ : in ftgmac100_setup_clk()
1735 * necessary if it's the AST2400 MAC, or the MAC is configured for in ftgmac100_setup_clk()
1736 * RGMII, or the controller is not an ASPEED-based controller. in ftgmac100_setup_clk()
1738 priv->rclk = devm_clk_get_optional(priv->dev, "RCLK"); in ftgmac100_setup_clk()
1739 rc = clk_prepare_enable(priv->rclk); in ftgmac100_setup_clk()
1744 clk_disable_unprepare(priv->clk); in ftgmac100_setup_clk()
1760 return -ENXIO; in ftgmac100_probe()
1769 err = -ENOMEM; in ftgmac100_probe()
1773 SET_NETDEV_DEV(netdev, &pdev->dev); in ftgmac100_probe()
1775 netdev->ethtool_ops = &ftgmac100_ethtool_ops; in ftgmac100_probe()
1776 netdev->netdev_ops = &ftgmac100_netdev_ops; in ftgmac100_probe()
1777 netdev->watchdog_timeo = 5 * HZ; in ftgmac100_probe()
1783 priv->netdev = netdev; in ftgmac100_probe()
1784 priv->dev = &pdev->dev; in ftgmac100_probe()
1785 INIT_WORK(&priv->reset_task, ftgmac100_reset_task); in ftgmac100_probe()
1788 priv->res = request_mem_region(res->start, resource_size(res), in ftgmac100_probe()
1789 dev_name(&pdev->dev)); in ftgmac100_probe()
1790 if (!priv->res) { in ftgmac100_probe()
1791 dev_err(&pdev->dev, "Could not reserve memory region\n"); in ftgmac100_probe()
1792 err = -ENOMEM; in ftgmac100_probe()
1796 priv->base = ioremap(res->start, resource_size(res)); in ftgmac100_probe()
1797 if (!priv->base) { in ftgmac100_probe()
1798 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n"); in ftgmac100_probe()
1799 err = -EIO; in ftgmac100_probe()
1803 netdev->irq = irq; in ftgmac100_probe()
1806 priv->tx_pause = true; in ftgmac100_probe()
1807 priv->rx_pause = true; in ftgmac100_probe()
1808 priv->aneg_pause = true; in ftgmac100_probe()
1813 np = pdev->dev.of_node; in ftgmac100_probe()
1814 if (np && (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_probe()
1815 of_device_is_compatible(np, "aspeed,ast2500-mac") || in ftgmac100_probe()
1816 of_device_is_compatible(np, "aspeed,ast2600-mac"))) { in ftgmac100_probe()
1817 priv->rxdes0_edorr_mask = BIT(30); in ftgmac100_probe()
1818 priv->txdes0_edotr_mask = BIT(30); in ftgmac100_probe()
1819 priv->is_aspeed = true; in ftgmac100_probe()
1821 if (of_device_is_compatible(np, "aspeed,ast2600-mac")) { in ftgmac100_probe()
1823 priv->base + FTGMAC100_OFFSET_TM); in ftgmac100_probe()
1826 priv->rxdes0_edorr_mask = BIT(15); in ftgmac100_probe()
1827 priv->txdes0_edotr_mask = BIT(15); in ftgmac100_probe()
1830 if (np && of_get_property(np, "use-ncsi", NULL)) { in ftgmac100_probe()
1832 dev_err(&pdev->dev, "NCSI stack not enabled\n"); in ftgmac100_probe()
1836 dev_info(&pdev->dev, "Using NCSI interface\n"); in ftgmac100_probe()
1837 priv->use_ncsi = true; in ftgmac100_probe()
1838 priv->ndev = ncsi_register_dev(netdev, ftgmac100_ncsi_handler); in ftgmac100_probe()
1839 if (!priv->ndev) in ftgmac100_probe()
1841 } else if (np && of_get_property(np, "phy-handle", NULL)) { in ftgmac100_probe()
1844 phy = of_phy_get_and_connect(priv->netdev, np, in ftgmac100_probe()
1847 dev_err(&pdev->dev, "Failed to connect to phy\n"); in ftgmac100_probe()
1864 priv->use_ncsi = false; in ftgmac100_probe()
1870 if (priv->is_aspeed) { in ftgmac100_probe()
1877 priv->rx_q_entries = priv->new_rx_q_entries = DEF_RX_QUEUE_ENTRIES; in ftgmac100_probe()
1878 priv->tx_q_entries = priv->new_tx_q_entries = DEF_TX_QUEUE_ENTRIES; in ftgmac100_probe()
1881 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_HW_CSUM | in ftgmac100_probe()
1885 if (priv->use_ncsi) in ftgmac100_probe()
1886 netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; in ftgmac100_probe()
1888 /* AST2400 doesn't have working HW checksum generation */ in ftgmac100_probe()
1889 if (np && (of_device_is_compatible(np, "aspeed,ast2400-mac"))) in ftgmac100_probe()
1890 netdev->hw_features &= ~NETIF_F_HW_CSUM; in ftgmac100_probe()
1891 if (np && of_get_property(np, "no-hw-checksum", NULL)) in ftgmac100_probe()
1892 netdev->hw_features &= ~(NETIF_F_HW_CSUM | NETIF_F_RXCSUM); in ftgmac100_probe()
1893 netdev->features |= netdev->hw_features; in ftgmac100_probe()
1898 dev_err(&pdev->dev, "Failed to register netdev\n"); in ftgmac100_probe()
1902 netdev_info(netdev, "irq %d, mapped at %p\n", netdev->irq, priv->base); in ftgmac100_probe()
1907 clk_disable_unprepare(priv->rclk); in ftgmac100_probe()
1908 clk_disable_unprepare(priv->clk); in ftgmac100_probe()
1910 if (priv->ndev) in ftgmac100_probe()
1911 ncsi_unregister_dev(priv->ndev); in ftgmac100_probe()
1914 iounmap(priv->base); in ftgmac100_probe()
1916 release_resource(priv->res); in ftgmac100_probe()
1931 if (priv->ndev) in ftgmac100_remove()
1932 ncsi_unregister_dev(priv->ndev); in ftgmac100_remove()
1935 clk_disable_unprepare(priv->rclk); in ftgmac100_remove()
1936 clk_disable_unprepare(priv->clk); in ftgmac100_remove()
1938 /* There's a small chance the reset task will have been re-queued, in ftgmac100_remove()
1941 cancel_work_sync(&priv->reset_task); in ftgmac100_remove()
1945 iounmap(priv->base); in ftgmac100_remove()
1946 release_resource(priv->res); in ftgmac100_remove()
1948 netif_napi_del(&priv->napi); in ftgmac100_remove()
1969 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");