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/Linux-v6.1/drivers/crypto/cavium/cpt/
Dcpt_common.h1 /* SPDX-License-Identifier: GPL-2.0-only */
20 #define CPT_FLAG_SRIOV_ENABLED BIT(1)
21 #define CPT_FLAG_VF_DRIVER BIT(2)
22 #define CPT_FLAG_DEVICE_READY BIT(3)
24 #define cpt_sriov_enabled(cpt) ((cpt)->flags & CPT_FLAG_SRIOV_ENABLED)
25 #define cpt_vf_driver(cpt) ((cpt)->flags & CPT_FLAG_VF_DRIVER)
26 #define cpt_device_ready(cpt) ((cpt)->flags & CPT_FLAG_DEVICE_READY)
39 #define CPTX_PF_CONSTANTS(a) (0x0ll + ((u64)(a) << 36))
40 #define CPTX_PF_RESET(a) (0x100ll + ((u64)(a) << 36))
41 #define CPTX_PF_DIAG(a) (0x120ll + ((u64)(a) << 36))
[all …]
/Linux-v6.1/Documentation/core-api/
Dpacking.rst6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
15 definitions from the hardware documentation into bit field indices for the
18 (sometimes even 64 bit ones). This creates the inconvenience of having to
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
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/Linux-v6.1/Documentation/devicetree/bindings/iommu/
Dapple,sart.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
20 and allows 36 bit of physical address space and filter entries with sizes
21 up to 24 bit.
23 SART2, first seen in A14 and M1, allows 36 bit of physical address space
24 and filter entry size up to 36 bit.
27 entry size to 42 bit.
32 - apple,t6000-sart
[all …]
/Linux-v6.1/arch/alpha/kernel/
Dsys_wildfire.c1 // SPDX-License-Identifier: GPL-2.0
41 int qbbno = (irq >> 8) & (WILDFIRE_MAX_QBB - 1); in wildfire_update_irq_hw()
42 int pcano = (irq >> 6) & (WILDFIRE_PCA_PER_QBB - 1); in wildfire_update_irq_hw()
49 " got irq %d for non-existent PCA %d" in wildfire_update_irq_hw()
57 enable0 = (unsigned long *) &pca->pca_int[0].enable; /* ??? */ in wildfire_update_irq_hw()
72 enable0 = (unsigned long *) &pca->pca_int[0].enable; in wildfire_init_irq_hw()
73 enable1 = (unsigned long *) &pca->pca_int[1].enable; in wildfire_init_irq_hw()
74 enable2 = (unsigned long *) &pca->pca_int[2].enable; in wildfire_init_irq_hw()
75 enable3 = (unsigned long *) &pca->pca_int[3].enable; in wildfire_init_irq_hw()
77 target0 = (unsigned long *) &pca->pca_int[0].target; in wildfire_init_irq_hw()
[all …]
Dsys_sable.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
39 /* Note mask bit is true for DISABLED irqs. */
42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
64 * Bit Meaning Kernel IRQ
65 *------------------------------------------
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/Linux-v6.1/arch/arm/include/asm/
Ddomain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 * DOMAIN_IO - domain 2 includes all IO only
19 * DOMAIN_USER - domain 1 includes all user memory only
20 * DOMAIN_KERNEL - domain 0 includes all kernel memory only
22 * The domain numbering depends on whether we support 36 physical
23 * address for I/O or not. Addresses above the 32 bit boundary can
26 * but there may be systems with supersection support and no 36-bit
30 * 36-bit addressing and supersections are only available on
92 : "m" (current_thread_info()->cpu_domain)); in get_domain()
/Linux-v6.1/arch/mips/include/asm/sgi/
Dheart.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2004-2007 Stanislaw Skowronek <skylark@unaligned.org>
7 * 2007-2015 Joshua Kinard <kumba@gentoo.org>
27 * struct ip30_heart_regs - struct that maps IP30 HEART registers.
28 * @mode: HEART_MODE - Purpose Unknown, machine reset called from here.
29 * @sdram_mode: HEART_SDRAM_MODE - purpose unknown.
30 * @mem_refresh: HEART_MEM_REF - purpose unknown.
31 * @mem_req_arb: HEART_MEM_REQ_ARB - purpose unknown.
32 * @mem_cfg.q: union for 64bit access to HEART_MEMCFG - 4x 64bit registers.
33 * @mem_cfg.l: union for 32bit access to HEART_MEMCFG - 8x 32bit registers.
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/Linux-v6.1/drivers/staging/fbtft/
Dfb_hx8353d.c1 // SPDX-License-Identifier: GPL-2.0+
22 par->fbtftops.reset(par); in init_display()
43 /* SLPOUT - Sleep out & booster on */ in init_display()
47 /* DISPON - Display On */ in init_display()
53 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, in init_display()
56 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, in init_display()
59 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62); in init_display()
76 #define my BIT(7)
77 #define mx BIT(6)
78 #define mv BIT(5)
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/Linux-v6.1/arch/mips/include/asm/octeon/
Dcvmx-pow.h7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * New, starting with SDK 1.7.0, cvmx-pow supports a number of
36 * enabled. For example, cvmx-pow will check for the following
38 * - Requesting a POW operation with an active tag switch in
40 * - Waiting for a tag switch to complete for an excessively
43 * - Illegal tag switches from NULL_NULL.
44 * - Illegal tag switches from NULL.
45 * - Illegal deschedule request.
[all …]
Dcvmx-address.h7 * Copyright (c) 2003-2009 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
76 /* send out a single-tick command on the NCB bus */
84 * Octeon-I HW never interprets this X (<39:36> reserved
87 * - 0x0 XXX0 0000 0000 to DRAM Cached
88 * - 0x0 XXX0 0FFF FFFF
90 * - 0x0 XXX0 1000 0000 to Boot Bus Uncached (Converted to 0x1 00X0 1000 0000
91 * - 0x0 XXX0 1FFF FFFF + EJTAG to 0x1 00X0 1FFF FFFF)
93 * - 0x0 XXX0 2000 0000 to DRAM Cached
[all …]
/Linux-v6.1/drivers/clk/renesas/
Drcar-gen2-cpg.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen2 Clock Pulse Generator
10 #include <linux/clk-provider.h>
18 #include "renesas-cpg-mssr.h"
19 #include "rcar-gen2-cpg.h"
22 #define CPG_FRQCRB_KICK BIT(31)
39 * prepare - clk_prepare only ensures that parents are prepared
40 * enable - clk_enable only ensures that parents are enabled
41 * rate - rate is adjustable. clk->rate = parent->rate * mult / 32
42 * parent - fixed parent. No clk_set_parent support
[all …]
/Linux-v6.1/arch/s390/include/asm/
Dnmi.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 #define MCCK_CODE_SYSTEM_DAMAGE BIT(63)
23 #define MCCK_CODE_EXT_DAMAGE BIT(63 - 5)
24 #define MCCK_CODE_CP BIT(63 - 9)
25 #define MCCK_CODE_STG_ERROR BIT(63 - 16)
26 #define MCCK_CODE_STG_KEY_ERROR BIT(63 - 18)
27 #define MCCK_CODE_STG_DEGRAD BIT(63 - 19)
28 #define MCCK_CODE_PSW_MWP_VALID BIT(63 - 20)
29 #define MCCK_CODE_PSW_IA_VALID BIT(63 - 23)
30 #define MCCK_CODE_STG_FAIL_ADDR BIT(63 - 24)
[all …]
/Linux-v6.1/arch/ia64/kernel/
Dpatch.c1 // SPDX-License-Identifier: GPL-2.0
3 * Instruction-patching support.
5 * Copyright (C) 2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
19 * The 64-bit value in a "movl reg=value" is scattered between the two words of the bundle
32 u64 *p = (u64 *) (insn_addr & -16); /* mask out slot number */ in get_imm64()
40 ((p[1] & 0x000007f000000000UL) >> 36); /*G*/ in get_imm64()
47 u64 m0, m1, v0, v1, b0, b1, *b = (u64 *) (insn_addr & -16); in ia64_patch()
48 # define insn_mask ((1UL << 41) - 1) in ia64_patch()
52 shift = 5 + 41 * (insn_addr % 16); /* 5 bits of template, then 3 x 41-bit instructions */ in ia64_patch()
[all …]
/Linux-v6.1/drivers/net/ethernet/microchip/lan966x/
Dlan966x_regs.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
3 /* This file is autogenerated by cml-utils 2021-10-10 13:25:08 +0200.
22 TARGET_ORG = 36,
45 #define AFI_PORT_CFG_FC_SKIP_TTI_INJ BIT(16)
60 #define ANA_ADVLEARN_VLAN_CHK BIT(0)
72 #define ANA_ANAINTR_INTR BIT(1)
78 #define ANA_ANAINTR_INTR_ENA BIT(0)
171 #define ANA_PGID_CFG_OBEY_VLAN BIT(0)
186 #define ANA_MACACCESS_CHANGE2SW BIT(17)
192 #define ANA_MACACCESS_MAC_CPU_COPY BIT(16)
[all …]
/Linux-v6.1/include/scsi/
Dsrp.h14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
107 * having the 20-byte structure padded to 24 bytes on 64-bit architectures.
143 * struct srp_login_req_rdma - RDMA/CM login parameters.
145 * RDMA/CM over InfiniBand can only carry 92 - 36 = 56 bytes of private
172 * bytes on 64-bit architectures.
252 * The SRP spec defines the size of the RSP structure to be 36 bytes,
254 * 64-bit architectures.
288 * 36 bytes, so it needs to be packed to avoid having it padded to 40 bytes
289 * on 64-bit architectures.
/Linux-v6.1/Documentation/fb/
Dcmap_xfbdev.rst7 - example of relevant structures in fbdev as used for a 3-bit grayscale cmap::
20 info->cmap.red[i] = (((2*i)+1)*(0xFFFF))/16;
21 memcpy(info->cmap.green, info->cmap.red, sizeof(u16)*8);
22 memcpy(info->cmap.blue, info->cmap.red, sizeof(u16)*8);
24 - X11 apps do something like the following when trying to use grayscale::
29 sprintf(colorspec, "rgb:%x/%x/%x", i*36,i*36,i*36);
41 xc-011010/programs/Xserver/dix/colormap.c::
45 dr = (long) pent->co.local.red - prgb->red;
46 dg = (long) pent->co.local.green - prgb->green;
47 db = (long) pent->co.local.blue - prgb->blue;
[all …]
/Linux-v6.1/drivers/gpu/drm/i915/
Di915_pci.c176 .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
177 .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
186 .__runtime.platform_engine_mask = BIT(RCS0), \
198 .__runtime.pipe_mask = BIT(PIPE_A), \
199 .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A), \
207 .__runtime.platform_engine_mask = BIT(RCS0), \
230 .__runtime.fbc_mask = BIT(INTEL_FBC_A),
236 .__runtime.fbc_mask = BIT(INTEL_FBC_A),
241 .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
242 .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Domap3-tao3530.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
26 cpu0-supply = <&vcc>;
37 compatible = "regulator-fixed";
38 regulator-name = "hsusb2_vbus";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
42 startup-delay-us = <70000>;
47 compatible = "usb-nop-xceiv";
[all …]
/Linux-v6.1/drivers/regulator/
Dstpmic1_regulator.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <dt-bindings/mfd/st,stpmic1.h>
63 REGULATOR_LINEAR_RANGE(725000, 5, 36, 25000),
78 REGULATOR_LINEAR_RANGE(1500000, 36, 63, 0),
87 REGULATOR_LINEAR_RANGE(1500000, 36, 55, 100000),
97 REGULATOR_LINEAR_RANGE(1500000, 36, 60, 100000),
361 .icc_mask = BIT(0),
363 .mask_reset_mask = BIT(0),
368 .icc_mask = BIT(1),
370 .mask_reset_mask = BIT(1),
[all …]
/Linux-v6.1/arch/alpha/include/uapi/asm/
Dauxvec.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
12 value is -1, then the cache doesn't exist. Otherwise:
14 bit 0-3: Cache set-associativity; 0 means fully associative.
15 bit 4-7: Log2 of cacheline size.
16 bit 8-31: Size of the entire cache >> 8.
17 bit 32-63: Reserved.
22 #define AT_L2_CACHESHAPE 36
/Linux-v6.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dpub.h34 #define PHY_TYPE_LCNXN 9 /* Phy type 2-stream N */
35 #define PHY_TYPE_HT 7 /* Phy type 3-Stream N */
42 #define BRCMS_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */
43 #define BRCMS_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */
44 #define BRCMS_RSSI_VERY_LOW -80 /* Very low quality cutoffs */
45 #define BRCMS_RSSI_LOW -70 /* Low quality cutoffs */
46 #define BRCMS_RSSI_GOOD -68 /* Good quality cutoffs */
47 #define BRCMS_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */
48 #define BRCMS_RSSI_EXCELLENT -57 /* Excellent quality cutoffs */
107 /* rates in 500kbps units w/hi bit set if basic */
[all …]
/Linux-v6.1/arch/powerpc/boot/dts/fsl/
Dppa8548.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PPA8548 Device Tree Source (36-bit address map)
7 * MPC8548 CDS Device Tree Source (36-bit address map)
11 /include/ "mpc8548si-pre.dtsi"
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&mpic>;
59 #address-cells = <1>;
60 #size-cells = <1>;
61 compatible = "cfi-flash";
[all …]
/Linux-v6.1/drivers/net/wireless/intel/iwlwifi/cfg/
D8000.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2014, 2018-2020 Intel Corporation
4 * Copyright (C) 2014-2015 Intel Mobile Communications GmbH
9 #include "iwl-config.h"
12 #define IWL8000_UCODE_API_MAX 36
13 #define IWL8265_UCODE_API_MAX 36
30 #define IWL8000_FW_PRE "iwlwifi-8000C-"
34 #define IWL8265_FW_PRE "iwlwifi-8265-"
38 #define DEFAULT_NVM_FILE_FAMILY_8000C "nvmData-8000C"
55 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ),
/Linux-v6.1/drivers/net/wireless/ath/ath10k/
Dsdio.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2004-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5 * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
23 #define ATH10K_HIF_MBOX0_EXT_WIDTH (36 * 1024)
25 #define ATH10K_HIF_MBOX1_EXT_WIDTH (36 * 1024)
29 (ATH10K_SDIO_MAX_BUFFER_SIZE - sizeof(struct ath10k_htc_hdr))
38 #define ATH10K_HTC_MAILBOX_MASK BIT(ATH10K_HTC_MAILBOX)
69 /* mode to enable special 4-bit interrupt assertion without clock */
70 #define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ BIT(0)
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtw89/
Dphy.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
11 #define RTW89_RF_ADDR_ADSEL_MASK BIT(16)
37 #define RA_MASK_HT_3SS_RATES GENMASK_ULL(43, 36)
42 #define RA_MASK_VHT_3SS_RATES GENMASK_ULL(45, 36)
47 #define RA_MASK_HE_3SS_RATES GENMASK_ULL(47, 36)
80 #define LNA0_GAIN (-24)
96 #define CCKPD_TH_MIN_RSSI (-18)
104 #define PHYSTS_MGNT BIT(RTW89_RX_TYPE_MGNT)
105 #define PHYSTS_CTRL BIT(RTW89_RX_TYPE_CTRL)
[all …]

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