Searched +full:0 +full:x11400000 (Results 1 – 17 of 17) sorted by relevance
/Linux-v6.6/arch/sh/boards/mach-se/7343/ |
D | irq.c | 22 #define PA_CPLD_BASE_ADDR 0x11400000 23 #define PA_CPLD_ST_REG 0x08 /* CPLD Interrupt status register */ 24 #define PA_CPLD_IMSK_REG 0x0a /* CPLD Interrupt mask register */ 57 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) { in se7343_domain_init() 60 if (unlikely(irq == 0)) { in se7343_domain_init() 73 irq_base = irq_linear_revmap(se7343_irq_domain, 0); in se7343_gc_init() 88 IRQ_NOREQUEST | IRQ_NOPROBE, 0); in se7343_gc_init() 117 iowrite16(0, se7343_irq_regs + PA_CPLD_IMSK_REG); in init_7343se_IRQ() 119 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ in init_7343se_IRQ()
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/Linux-v6.6/Documentation/devicetree/bindings/mfd/ |
D | samsung,exynos5433-lpass.yaml | 40 "^dma-controller@[0-9a-f]+$": 43 "^i2s@[0-9a-f]+$": 46 "^serial@[0-9a-f]+$": 67 reg = <0x11400000 0x100>, <0x11500000 0x08>; 77 reg = <0x11420000 0x1000>; 89 reg = <0x11440000 0x100>; 90 dmas = <&adma 0>, <&adma 2>; 94 #size-cells = <0>; 101 pinctrl-0 = <&i2s0_bus>; 108 reg = <0x11460000 0x100>; [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/pci/ |
D | mediatek-pcie.txt | 32 where N starting from 0 to one less than the number of root ports. 80 reg = <0 0x1a000000 0 0x1000>; 88 reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */ 89 <0 0x1a142000 0 0x1000>, /* Port0 registers */ 90 <0 0x1a143000 0 0x1000>, /* Port1 registers */ 91 <0 0x1a144000 0 0x1000>; /* Port2 registers */ 96 interrupt-map-mask = <0xf800 0 0 0>; 97 interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>, 98 <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>, 99 <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/pinctrl/ |
D | samsung,pinctrl.yaml | 78 "^[a-z]+[0-9]*-gpio-bank$": 143 reg = <0x7f008000 0x1000>; 149 interrupts-extended = <&vic0 0>, 151 <&vic1 0>, 166 samsung,pins = "gpa-0", "gpa-1"; 168 samsung,pin-pud = <0>; 179 reg = <0x11400000 0x1000>; 183 pinctrl-0 = <&sleep0>; 196 samsung,pins = "gpa0-0", "gpa0-1"; 198 samsung,pin-pud = <0>; [all …]
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/Linux-v6.6/arch/arm/boot/dts/samsung/ |
D | exynos4210.dtsi | 178 #size-cells = <0>; 194 reg = <0x900>; 213 reg = <0x901>; 230 bus_leftbus_opp_table: opp-table-0 { 249 reg = <0x02020000 0x20000>; 252 ranges = <0 0x02020000 0x20000>; 254 smp-sram@0 { 256 reg = <0x0 0x1000>; 261 reg = <0x1f000 0x1000>; 267 reg = <0x10023ca0 0x20>; [all …]
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D | exynos4x12.dtsi | 70 #interconnect-cells = <0>; 80 #interconnect-cells = <0>; 120 #interconnect-cells = <0>; 211 reg = <0x11400000 0x1000>; 217 reg = <0x11000000 0x1000>; 229 reg = <0x03860000 0x1000>; 231 interrupts = <10 0>; 236 reg = <0x106e0000 0x1000>; 242 reg = <0x02020000 0x40000>; 245 ranges = <0 0x02020000 0x40000>; [all …]
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D | exynos3250.dtsi | 199 #size-cells = <0>; 212 cpu0: cpu@0 { 215 reg = <0>; 259 xusbxti: clock-0 { 261 clock-frequency = <0>; 262 #clock-cells = <0>; 268 clock-frequency = <0>; 269 #clock-cells = <0>; 275 clock-frequency = <0>; 276 #clock-cells = <0>; [all …]
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D | exynos5250.dtsi | 47 #size-cells = <0>; 60 cpu0: cpu@0 { 63 reg = <0>; 80 cpu0_opp_table: opp-table-0 { 176 reg = <0x02020000 0x30000>; 179 ranges = <0 0x02020000 0x30000>; 181 smp-sram@0 { 183 reg = <0x0 0x1000>; 188 reg = <0x2f000 0x1000>; 194 reg = <0x10044000 0x20>; [all …]
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/Linux-v6.6/arch/arm64/boot/dts/mediatek/ |
D | mt2712e.dtsi | 22 cluster0_opp: opp-table-0 { 66 #size-cells = <0>; 85 cpu0: cpu@0 { 88 reg = <0x000>; 100 reg = <0x001>; 113 reg = <0x200>; 126 CPU_SLEEP_0: cpu-sleep-0 { 132 arm,psci-suspend-param = <0x0010000>; 135 CLUSTER_SLEEP_0: cluster-sleep-0 { 141 arm,psci-suspend-param = <0x1010000>; [all …]
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/Linux-v6.6/arch/arm64/boot/dts/exynos/ |
D | exynos850.dtsi | 52 #clock-cells = <0>; 57 #size-cells = <0>; 91 cpu0: cpu@0 { 94 reg = <0x0>; 100 reg = <0x1>; 106 reg = <0x2>; 112 reg = <0x3>; 118 reg = <0x100>; 124 reg = <0x101>; 130 reg = <0x102>; [all …]
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D | exynos5433.dtsi | 48 #clock-cells = <0>; 53 #size-cells = <0>; 91 reg = <0x100>; 96 i-cache-size = <0x8000>; 99 d-cache-size = <0x8000>; 109 reg = <0x101>; 112 i-cache-size = <0x8000>; 115 d-cache-size = <0x8000>; 125 reg = <0x102>; 128 i-cache-size = <0x8000>; [all …]
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/Linux-v6.6/arch/hexagon/kernel/ |
D | vm_init_segtable.S | 16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages. 46 /* VA 0x00000000 */ 59 /* VA 0x40000000 */ 68 /* VA 0x80000000 */ 74 /*0xa8*/.word X,X,X,X 77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000) 79 /*0xa9*/.word X,X,X,X 81 /*0xaa*/.word X,X,X,X 82 /*0xab*/.word X,X,X,X 83 /*0xac*/.word X,X,X,X [all …]
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/Linux-v6.6/drivers/net/ethernet/microchip/sparx5/ |
D | sparx5_main.c | 55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */ 56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */ 57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */ 58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */ 59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */ 60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */ 61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */ 62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */ 63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */ 64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */ [all …]
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/Linux-v6.6/arch/arm64/boot/dts/tesla/ |
D | fsd.dtsi | 39 #size-cells = <0>; 88 /* Cluster 0 */ 89 cpucl0_0: cpu@0 { 92 reg = <0x0 0x000>; 96 i-cache-size = <0xc000>; 99 d-cache-size = <0x8000>; 108 reg = <0x0 0x001>; 112 i-cache-size = <0xc000>; 115 d-cache-size = <0x8000>; 124 reg = <0x0 0x002>; [all …]
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/Linux-v6.6/arch/mips/alchemy/common/ |
D | dbdma.c | 68 { AU1550_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, 69 { AU1550_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, 70 { AU1550_DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 }, 71 { AU1550_DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 }, 74 { AU1550_DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, 75 { AU1550_DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, 76 { AU1550_DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 }, 77 { AU1550_DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 }, 80 { AU1550_DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 }, 81 { AU1550_DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 }, [all …]
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/Linux-v6.6/arch/mips/include/asm/mach-au1x00/ |
D | au1000.h | 105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300 108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */ 109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */ 110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */ 111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */ 112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */ 113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */ 114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */ 115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */ 116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */ [all …]
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/Linux-v6.6/drivers/clk/samsung/ |
D | clk-exynos850.c | 34 /* Register Offset definitions for CMU_TOP (0x120e0000) */ 35 #define PLL_LOCKTIME_PLL_MMC 0x0000 36 #define PLL_LOCKTIME_PLL_SHARED0 0x0004 37 #define PLL_LOCKTIME_PLL_SHARED1 0x0008 38 #define PLL_CON0_PLL_MMC 0x0100 39 #define PLL_CON3_PLL_MMC 0x010c 40 #define PLL_CON0_PLL_SHARED0 0x0140 41 #define PLL_CON3_PLL_SHARED0 0x014c 42 #define PLL_CON0_PLL_SHARED1 0x0180 43 #define PLL_CON3_PLL_SHARED1 0x018c [all …]
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