Lines Matching +full:0 +full:x11400000
52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
100 reg = <0x1>;
106 reg = <0x2>;
112 reg = <0x3>;
118 reg = <0x100>;
124 reg = <0x101>;
130 reg = <0x102>;
136 reg = <0x103>;
156 soc: soc@0 {
160 ranges = <0x0 0x0 0x0 0x20000000>;
164 reg = <0x10000000 0x100>;
170 reg = <0x10040000 0x800>;
190 #address-cells = <0>;
191 reg = <0x12a01000 0x1000>,
192 <0x12a02000 0x2000>,
193 <0x12a04000 0x2000>,
194 <0x12a06000 0x2000>;
202 reg = <0x11860000 0x10000>;
207 offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
208 mask = <0x2>; /* SWRESET_SYSTEM */
209 value = <0x2>; /* reset value */
215 reg = <0x10050000 0x100>;
220 samsung,cluster-index = <0>;
226 reg = <0x10060000 0x100>;
237 reg = <0x10030000 0x8000>;
249 reg = <0x11400000 0x8000>;
258 reg = <0x11800000 0x8000>;
267 reg = <0x11c00000 0x8000>;
276 reg = <0x12000000 0x8000>;
290 reg = <0x120e0000 0x8000>;
299 reg = <0x12c00000 0x8000>;
314 reg = <0x13000000 0x8000>;
323 reg = <0x13400000 0x8000>;
336 reg = <0x14500000 0x8000>;
350 reg = <0x14a00000 0x8000>;
359 reg = <0x11850000 0x1000>;
368 reg = <0x11c30000 0x1000>;
377 reg = <0x12070000 0x1000>;
383 reg = <0x13430000 0x1000>;
389 reg = <0x139b0000 0x1000>;
395 reg = <0x14a60000 0x1000>;
400 reg = <0x11a30000 0x100>;
410 reg = <0x12100000 0x2000>;
413 #size-cells = <0>;
417 fifo-depth = <0x40>;
423 reg = <0x13830000 0x100>;
426 #size-cells = <0>;
428 pinctrl-0 = <&i2c0_pins>;
436 reg = <0x13840000 0x100>;
439 #size-cells = <0>;
441 pinctrl-0 = <&i2c1_pins>;
449 reg = <0x13850000 0x100>;
452 #size-cells = <0>;
454 pinctrl-0 = <&i2c2_pins>;
462 reg = <0x13860000 0x100>;
465 #size-cells = <0>;
467 pinctrl-0 = <&i2c3_pins>;
475 reg = <0x13870000 0x100>;
478 #size-cells = <0>;
480 pinctrl-0 = <&i2c4_pins>;
489 reg = <0x13880000 0x100>;
492 #size-cells = <0>;
494 pinctrl-0 = <&i2c5_pins>;
503 reg = <0x13890000 0x100>;
506 #size-cells = <0>;
508 pinctrl-0 = <&i2c6_pins>;
516 reg = <0x12c50000 0x9000>;
520 #iommu-cells = <0>;
525 reg = <0x130c0000 0x9000>;
529 #iommu-cells = <0>;
534 reg = <0x14550000 0x9000>;
538 #iommu-cells = <0>;
543 reg = <0x14570000 0x9000>;
547 #iommu-cells = <0>;
552 reg = <0x14850000 0x9000>;
556 #iommu-cells = <0>;
562 reg = <0x10020000 0x10000>;
569 reg = <0x11c20000 0x10000>;
575 reg = <0x138200c0 0x20>;
576 samsung,sysreg = <&sysreg_peri 0x1010>;
588 reg = <0x13820000 0xc0>;
591 pinctrl-0 = <&uart0_pins>;
601 reg = <0x138a00c0 0x20>;
602 samsung,sysreg = <&sysreg_peri 0x1020>;
614 reg = <0x138a0000 0xc0>;
617 #size-cells = <0>;
619 pinctrl-0 = <&hsi2c0_pins>;
629 reg = <0x138b00c0 0x20>;
630 samsung,sysreg = <&sysreg_peri 0x1030>;
642 reg = <0x138b0000 0xc0>;
645 #size-cells = <0>;
647 pinctrl-0 = <&hsi2c1_pins>;
657 reg = <0x138c00c0 0x20>;
658 samsung,sysreg = <&sysreg_peri 0x1040>;
670 reg = <0x138c0000 0xc0>;
673 #size-cells = <0>;
675 pinctrl-0 = <&hsi2c2_pins>;
685 reg = <0x139400c0 0x20>;
686 samsung,sysreg = <&sysreg_peri 0x1050>;
699 reg = <0x11d000c0 0x20>;
700 samsung,sysreg = <&sysreg_cmgp 0x2000>;
712 reg = <0x11d00000 0xc0>;
715 #size-cells = <0>;
717 pinctrl-0 = <&hsi2c3_pins>;
726 reg = <0x11d00000 0xc0>;
729 pinctrl-0 = <&uart1_single_pins>;
739 reg = <0x11d200c0 0x20>;
740 samsung,sysreg = <&sysreg_cmgp 0x2010>;
752 reg = <0x11d20000 0xc0>;
755 #size-cells = <0>;
757 pinctrl-0 = <&hsi2c4_pins>;
766 reg = <0x11d20000 0xc0>;
769 pinctrl-0 = <&uart2_single_pins>;