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Searched refs:umc (Results 1 – 17 of 17) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Damdgpu_umc.c52 kcalloc(adev->umc.max_ras_err_cnt_per_query, in amdgpu_umc_page_retirement_mca()
91 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
92 adev->umc.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_umc_do_page_retirement()
93 adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, ras_error_status); in amdgpu_umc_do_page_retirement()
95 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
96 adev->umc.ras->ras_block.hw_ops->query_ras_error_address && in amdgpu_umc_do_page_retirement()
97 adev->umc.max_ras_err_cnt_per_query) { in amdgpu_umc_do_page_retirement()
99 kcalloc(adev->umc.max_ras_err_cnt_per_query, in amdgpu_umc_do_page_retirement()
112 adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, ras_error_status); in amdgpu_umc_do_page_retirement()
115 if (adev->umc.ras && in amdgpu_umc_do_page_retirement()
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Dumc_v8_10.c75 return adev->umc.channel_offs * ch_inst + UMC_8_INST_DIST * umc_inst + in get_umc_v8_10_reg_offset()
216 adev->umc.channel_idx_tbl[node_inst * adev->umc.umc_inst_num * in umc_v8_10_convert_error_address()
217 adev->umc.channel_inst_num + in umc_v8_10_convert_error_address()
218 umc_inst * adev->umc.channel_inst_num + in umc_v8_10_convert_error_address()
343 eccinfo_table_idx = node_inst * adev->umc.umc_inst_num * in umc_v8_10_ecc_info_query_correctable_error_count()
344 adev->umc.channel_inst_num + in umc_v8_10_ecc_info_query_correctable_error_count()
345 umc_inst * adev->umc.channel_inst_num + in umc_v8_10_ecc_info_query_correctable_error_count()
364 eccinfo_table_idx = node_inst * adev->umc.umc_inst_num * in umc_v8_10_ecc_info_query_uncorrectable_error_count()
365 adev->umc.channel_inst_num + in umc_v8_10_ecc_info_query_uncorrectable_error_count()
366 umc_inst * adev->umc.channel_inst_num + in umc_v8_10_ecc_info_query_uncorrectable_error_count()
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Dumc_v6_7.c50 uint32_t index = umc_inst * adev->umc.channel_inst_num + ch_inst; in get_umc_v6_7_reg_offset()
57 return adev->umc.channel_offs * ch_inst + UMC_V6_7_INST_DIST * umc_inst; in get_umc_v6_7_reg_offset()
106 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_query_correctable_error_count()
119 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_ecc_info_query_correctable_error_count()
148 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
195 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_convert_error_address()
231 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_query_error_address()
319 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_query_correctable_error_count()
Damdgpu_umc.h40 #define LOOP_UMC_INST(umc_inst) for ((umc_inst) = 0; (umc_inst) < adev->umc.umc_inst_num; (umc_inst…
41 #define LOOP_UMC_CH_INST(ch_inst) for ((ch_inst) = 0; (ch_inst) < adev->umc.channel_inst_num; (ch_i…
45 for_each_set_bit((node_inst), &(adev->umc.active_mask), adev->umc.node_inst_num)
Dgmc_v9_0.c1459 adev->umc.funcs = &umc_v6_0_funcs; in gmc_v9_0_set_umc_funcs()
1462 adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM; in gmc_v9_0_set_umc_funcs()
1463 adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM; in gmc_v9_0_set_umc_funcs()
1464 adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM; in gmc_v9_0_set_umc_funcs()
1465 adev->umc.channel_offs = UMC_V6_1_PER_CHANNEL_OFFSET_VG20; in gmc_v9_0_set_umc_funcs()
1466 adev->umc.retire_unit = 1; in gmc_v9_0_set_umc_funcs()
1467 adev->umc.channel_idx_tbl = &umc_v6_1_channel_idx_tbl[0][0]; in gmc_v9_0_set_umc_funcs()
1468 adev->umc.ras = &umc_v6_1_ras; in gmc_v9_0_set_umc_funcs()
1471 adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM; in gmc_v9_0_set_umc_funcs()
1472 adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM; in gmc_v9_0_set_umc_funcs()
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Dgmc_v11_0.c592 adev->umc.channel_inst_num = UMC_V8_10_CHANNEL_INSTANCE_NUM; in gmc_v11_0_set_umc_funcs()
593 adev->umc.umc_inst_num = UMC_V8_10_UMC_INSTANCE_NUM; in gmc_v11_0_set_umc_funcs()
594 adev->umc.max_ras_err_cnt_per_query = UMC_V8_10_TOTAL_CHANNEL_NUM(adev); in gmc_v11_0_set_umc_funcs()
595 adev->umc.channel_offs = UMC_V8_10_PER_CHANNEL_OFFSET; in gmc_v11_0_set_umc_funcs()
596 adev->umc.retire_unit = UMC_V8_10_NA_COL_2BITS_POWER_OF_2_NUM; in gmc_v11_0_set_umc_funcs()
597 if (adev->umc.node_inst_num == 4) in gmc_v11_0_set_umc_funcs()
598 adev->umc.channel_idx_tbl = &umc_v8_10_channel_idx_tbl_ext0[0][0][0]; in gmc_v11_0_set_umc_funcs()
600 adev->umc.channel_idx_tbl = &umc_v8_10_channel_idx_tbl[0][0][0]; in gmc_v11_0_set_umc_funcs()
601 adev->umc.ras = &umc_v8_10_ras; in gmc_v11_0_set_umc_funcs()
948 if (adev->umc.funcs && adev->umc.funcs->init_registers) in gmc_v11_0_hw_init()
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Dumc_v8_7.c47 return adev->umc.channel_offs*ch_inst + UMC_8_INST_DIST*umc_inst; in get_umc_v8_7_reg_offset()
58 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_query_correctable_error_count()
77 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
119 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v8_7_convert_error_address()
139 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_query_error_address()
Dgmc_v10_0.c685 adev->umc.max_ras_err_cnt_per_query = UMC_V8_7_TOTAL_CHANNEL_NUM; in gmc_v10_0_set_umc_funcs()
686 adev->umc.channel_inst_num = UMC_V8_7_CHANNEL_INSTANCE_NUM; in gmc_v10_0_set_umc_funcs()
687 adev->umc.umc_inst_num = UMC_V8_7_UMC_INSTANCE_NUM; in gmc_v10_0_set_umc_funcs()
688 adev->umc.channel_offs = UMC_V8_7_PER_CHANNEL_OFFSET_SIENNA; in gmc_v10_0_set_umc_funcs()
689 adev->umc.retire_unit = 1; in gmc_v10_0_set_umc_funcs()
690 adev->umc.channel_idx_tbl = &umc_v8_7_channel_idx_tbl[0][0]; in gmc_v10_0_set_umc_funcs()
691 adev->umc.ras = &umc_v8_7_ras; in gmc_v10_0_set_umc_funcs()
1110 if (adev->umc.funcs && adev->umc.funcs->init_registers) in gmc_v10_0_hw_init()
1111 adev->umc.funcs->init_registers(adev); in gmc_v10_0_hw_init()
Damdgpu_ras.c996 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_ras_get_ecc_info()
997 adev->umc.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_ras_get_ecc_info()
998 adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, err_data); in amdgpu_ras_get_ecc_info()
1003 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_ras_get_ecc_info()
1004 adev->umc.ras->ras_block.hw_ops->query_ras_error_address) in amdgpu_ras_get_ecc_info()
1005 adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, err_data); in amdgpu_ras_get_ecc_info()
1007 if (adev->umc.ras && in amdgpu_ras_get_ecc_info()
1008 adev->umc.ras->ecc_info_query_ras_error_count) in amdgpu_ras_get_ecc_info()
1009 adev->umc.ras->ecc_info_query_ras_error_count(adev, err_data); in amdgpu_ras_get_ecc_info()
1011 if (adev->umc.ras && in amdgpu_ras_get_ecc_info()
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Dumc_v6_1.c91 return adev->umc.channel_offs*ch_inst + UMC_6_INST_DIST*umc_inst; in get_umc_6_reg_offset()
303 …uint32_t channel_index = adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst… in umc_v6_1_query_error_address()
Damdgpu_ras_eeprom.c420 if (adev->umc.ras && in amdgpu_ras_eeprom_reset_table()
421 adev->umc.ras->set_eeprom_table_version) in amdgpu_ras_eeprom_reset_table()
422 adev->umc.ras->set_eeprom_table_version(hdr); in amdgpu_ras_eeprom_reset_table()
Damdgpu_discovery.c643 adev->umc.active_mask = ((1 << adev->umc.node_inst_num) - 1) & in amdgpu_discovery_read_from_harvest_table()
1288 adev->umc.node_inst_num++; in amdgpu_discovery_reg_base_init()
Damdgpu.h962 struct amdgpu_umc umc; member
/Linux-v6.6/drivers/edac/
Damd64_edac.c1116 static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) in umc_normaddr_to_sysaddr() argument
1136 ctx.inst_id = umc; in umc_normaddr_to_sysaddr()
1139 if (df_indirect_read_instance(nid, 0, 0x1B4, umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1153 if (df_indirect_read_instance(nid, 0, 0x110 + (8 * base), umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1176 if (df_indirect_read_instance(nid, 0, 0x114 + (8 * base), umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1232 if (df_indirect_read_instance(nid, 0, 0x50, umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1348 if (!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT)) in umc_determine_edac_cap()
1354 if (pvt->umc[i].umc_cfg & BIT(12)) in umc_determine_edac_cap()
1533 static int umc_addr_mask_to_cs_size(struct amd64_pvt *pvt, u8 umc, in umc_addr_mask_to_cs_size() argument
1577 addr_mask_orig = pvt->csels[umc].csmasks_sec[cs_mask_nr]; in umc_addr_mask_to_cs_size()
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Damd64_edac.h386 struct amd64_umc *umc; /* UMC registers */ member
/Linux-v6.6/arch/x86/kernel/cpu/
DMakefile42 obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
/Linux-v6.6/drivers/scsi/
Dmegaraid.c3505 megacmd_t __user *umc; in mega_n_to_m() local
3525 umc = MBOX_P(uiocp); in mega_n_to_m()
3527 if (get_user(upthru, (mega_passthru __user * __user *)&umc->xferaddr)) in mega_n_to_m()
3542 umc = (megacmd_t __user *)uioc_mimd->mbox; in mega_n_to_m()
3544 if (get_user(upthru, (mega_passthru __user * __user *)&umc->xferaddr)) in mega_n_to_m()