52 		kcalloc(adev->umc.max_ras_err_cnt_per_query,  in amdgpu_umc_page_retirement_mca()
91 		if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops &&  in amdgpu_umc_do_page_retirement()
92 		    adev->umc.ras->ras_block.hw_ops->query_ras_error_count)  in amdgpu_umc_do_page_retirement()
93 		    adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
95 		if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops &&  in amdgpu_umc_do_page_retirement()
96 		    adev->umc.ras->ras_block.hw_ops->query_ras_error_address &&  in amdgpu_umc_do_page_retirement()
97 		    adev->umc.max_ras_err_cnt_per_query) {  in amdgpu_umc_do_page_retirement()
99 				kcalloc(adev->umc.max_ras_err_cnt_per_query,  in amdgpu_umc_do_page_retirement()
112 			adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
115 		if (adev->umc.ras &&  in amdgpu_umc_do_page_retirement()
116 		    adev->umc.ras->ecc_info_query_ras_error_count)  in amdgpu_umc_do_page_retirement()
117 		    adev->umc.ras->ecc_info_query_ras_error_count(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
119 		if (adev->umc.ras &&  in amdgpu_umc_do_page_retirement()
120 		    adev->umc.ras->ecc_info_query_ras_error_address &&  in amdgpu_umc_do_page_retirement()
121 		    adev->umc.max_ras_err_cnt_per_query) {  in amdgpu_umc_do_page_retirement()
123 				kcalloc(adev->umc.max_ras_err_cnt_per_query,  in amdgpu_umc_do_page_retirement()
136 			adev->umc.ras->ecc_info_query_ras_error_address(adev, ras_error_status);  in amdgpu_umc_do_page_retirement()
220 	if (!adev->umc.ras)  in amdgpu_umc_ras_sw_init()
223 	ras = adev->umc.ras;  in amdgpu_umc_ras_sw_init()
231 	strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc");  in amdgpu_umc_ras_sw_init()
234 	adev->umc.ras_if = &ras->ras_block.ras_comm;  in amdgpu_umc_ras_sw_init()
260 	if (adev->umc.ras &&  in amdgpu_umc_ras_late_init()
261 	    adev->umc.ras->err_cnt_init)  in amdgpu_umc_ras_late_init()
262 		adev->umc.ras->err_cnt_init(adev);  in amdgpu_umc_ras_late_init()
275 	struct ras_common_if *ras_if = adev->umc.ras_if;  in amdgpu_umc_process_ecc_irq()
318 	if (adev->umc.node_inst_num) {  in amdgpu_umc_loop_channels()