| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ring.c | 52 struct amdgpu_ring *ring);
53 static void amdgpu_debugfs_ring_fini(struct amdgpu_ring *ring);
65 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw) in amdgpu_ring_alloc() argument
69 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
74 if (WARN_ON_ONCE(ndw > ring->max_dw)) in amdgpu_ring_alloc()
77 ring->count_dw = ndw; in amdgpu_ring_alloc()
78 ring->wptr_old = ring->wptr; in amdgpu_ring_alloc()
80 if (ring->funcs->begin_use) in amdgpu_ring_alloc()
81 ring->funcs->begin_use(ring); in amdgpu_ring_alloc()
93 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) in amdgpu_ring_insert_nop() argument
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| D | amdgpu_fence.c | 56 struct amdgpu_ring *ring; member
98 static void amdgpu_fence_write(struct amdgpu_ring *ring, u32 seq) in amdgpu_fence_write() argument
100 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
114 static u32 amdgpu_fence_read(struct amdgpu_ring *ring) in amdgpu_fence_read() argument
116 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
136 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f, in amdgpu_fence_emit() argument
139 struct amdgpu_device *adev = ring->adev; in amdgpu_fence_emit()
149 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit()
150 fence->ring = ring; in amdgpu_fence_emit()
152 &ring->fence_drv.lock, in amdgpu_fence_emit()
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| D | amdgpu_ring.h | 88 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
90 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
92 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
97 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
99 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s);
100 bool amdgpu_fence_process(struct amdgpu_ring *ring);
101 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
102 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
105 unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
122 u64 (*get_rptr)(struct amdgpu_ring *ring);
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| D | vcn_v1_0.c | 50 static void vcn_v1_0_jpeg_ring_set_patch_ring(struct amdgpu_ring *ring, uint32_t ptr);
86 struct amdgpu_ring *ring; in vcn_v1_0_sw_init() local
127 ring = &adev->vcn.inst->ring_dec; in vcn_v1_0_sw_init()
128 sprintf(ring->name, "vcn_dec"); in vcn_v1_0_sw_init()
129 r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); in vcn_v1_0_sw_init()
145 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_sw_init()
146 sprintf(ring->name, "vcn_enc%d", i); in vcn_v1_0_sw_init()
147 r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); in vcn_v1_0_sw_init()
152 ring = &adev->vcn.inst->ring_jpeg; in vcn_v1_0_sw_init()
153 sprintf(ring->name, "vcn_jpeg"); in vcn_v1_0_sw_init()
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| D | vcn_v2_0.c | 115 struct amdgpu_ring *ring; in vcn_v2_0_sw_init() local
159 ring = &adev->vcn.inst->ring_dec; in vcn_v2_0_sw_init()
161 ring->use_doorbell = true; in vcn_v2_0_sw_init()
162 ring->doorbell_index = adev->doorbell_index.vcn.vcn_ring0_1 << 1; in vcn_v2_0_sw_init()
164 sprintf(ring->name, "vcn_dec"); in vcn_v2_0_sw_init()
165 r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); in vcn_v2_0_sw_init()
188 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()
189 ring->use_doorbell = true; in vcn_v2_0_sw_init()
190 ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + i; in vcn_v2_0_sw_init()
191 sprintf(ring->name, "vcn_enc%d", i); in vcn_v2_0_sw_init()
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| D | amdgpu_ib.c | 122 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, in amdgpu_ib_schedule() argument
126 struct amdgpu_device *adev = ring->adev; in amdgpu_ib_schedule()
153 if (!ring->sched.ready) { in amdgpu_ib_schedule()
154 dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
163 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
164 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
166 r = amdgpu_ring_alloc(ring, alloc_size); in amdgpu_ib_schedule()
172 need_ctx_switch = ring->current_ctx != fence_ctx; in amdgpu_ib_schedule()
173 if (ring->funcs->emit_pipeline_sync && job && in amdgpu_ib_schedule()
176 amdgpu_vm_need_pipeline_sync(ring, job))) { in amdgpu_ib_schedule()
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| /Linux-v5.4/drivers/net/wireless/broadcom/b43legacy/ |
| D | dma.c | 32 struct b43legacy_dmadesc32 *op32_idx2desc(struct b43legacy_dmaring *ring, in op32_idx2desc() argument
38 *meta = &(ring->meta[slot]); in op32_idx2desc()
39 desc = ring->descbase; in op32_idx2desc()
45 static void op32_fill_descriptor(struct b43legacy_dmaring *ring, in op32_fill_descriptor() argument
50 struct b43legacy_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
57 B43legacy_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
62 addr |= ring->dev->dma.translation; in op32_fill_descriptor()
63 ctl = (bufsize - ring->frameoffset) in op32_fill_descriptor()
65 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
80 static void op32_poke_tx(struct b43legacy_dmaring *ring, int slot) in op32_poke_tx() argument
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| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | radeon_ring.c | 49 static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
62 struct radeon_ring *ring) in radeon_ring_supports_scratch_reg() argument
64 switch (ring->idx) { in radeon_ring_supports_scratch_reg()
82 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring) in radeon_ring_free_size() argument
84 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_free_size()
87 ring->ring_free_dw = rptr + (ring->ring_size / 4); in radeon_ring_free_size()
88 ring->ring_free_dw -= ring->wptr; in radeon_ring_free_size()
89 ring->ring_free_dw &= ring->ptr_mask; in radeon_ring_free_size()
90 if (!ring->ring_free_dw) { in radeon_ring_free_size()
92 ring->ring_free_dw = ring->ring_size / 4; in radeon_ring_free_size()
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| D | evergreen_dma.c | 44 struct radeon_ring *ring = &rdev->ring[fence->ring]; in evergreen_dma_fence_ring_emit() local
45 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
47 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0)); in evergreen_dma_fence_ring_emit()
48 radeon_ring_write(ring, addr & 0xfffffffc); in evergreen_dma_fence_ring_emit()
49 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in evergreen_dma_fence_ring_emit()
50 radeon_ring_write(ring, fence->seq); in evergreen_dma_fence_ring_emit()
52 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0)); in evergreen_dma_fence_ring_emit()
54 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0)); in evergreen_dma_fence_ring_emit()
55 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2)); in evergreen_dma_fence_ring_emit()
56 radeon_ring_write(ring, 1); in evergreen_dma_fence_ring_emit()
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| D | r600_dma.c | 52 struct radeon_ring *ring) in r600_dma_get_rptr() argument
57 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_dma_get_rptr()
73 struct radeon_ring *ring) in r600_dma_get_wptr() argument
87 struct radeon_ring *ring) in r600_dma_set_wptr() argument
89 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
109 rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; in r600_dma_stop()
122 struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; in r600_dma_resume() local
131 rb_bufsz = order_base_2(ring->ring_size / 4); in r600_dma_resume()
151 WREG32(DMA_RB_BASE, ring->gpu_addr >> 8); in r600_dma_resume()
167 ring->wptr = 0; in r600_dma_resume()
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| D | uvd_v1_0.c | 40 struct radeon_ring *ring) in uvd_v1_0_get_rptr() argument
54 struct radeon_ring *ring) in uvd_v1_0_get_wptr() argument
68 struct radeon_ring *ring) in uvd_v1_0_set_wptr() argument
70 WREG32(UVD_RBC_RB_WPTR, ring->wptr); in uvd_v1_0_set_wptr()
84 struct radeon_ring *ring = &rdev->ring[fence->ring]; in uvd_v1_0_fence_emit() local
85 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v1_0_fence_emit()
87 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA0, 0)); in uvd_v1_0_fence_emit()
88 radeon_ring_write(ring, addr & 0xffffffff); in uvd_v1_0_fence_emit()
89 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v1_0_fence_emit()
90 radeon_ring_write(ring, fence->seq); in uvd_v1_0_fence_emit()
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| D | cik_sdma.c | 64 struct radeon_ring *ring) in cik_sdma_get_rptr() argument
69 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_sdma_get_rptr()
71 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_rptr()
91 struct radeon_ring *ring) in cik_sdma_get_wptr() argument
95 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_wptr()
112 struct radeon_ring *ring) in cik_sdma_set_wptr() argument
116 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_set_wptr()
121 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cik_sdma_set_wptr()
136 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute() local
137 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute()
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| D | radeon_fence.c | 68 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) in radeon_fence_write() argument
70 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
89 static u32 radeon_fence_read(struct radeon_device *rdev, int ring) in radeon_fence_read() argument
91 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
114 static void radeon_fence_schedule_check(struct radeon_device *rdev, int ring) in radeon_fence_schedule_check() argument
121 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
137 int ring) in radeon_fence_emit() argument
147 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_emit()
148 (*fence)->ring = ring; in radeon_fence_emit()
152 rdev->fence_context + ring, in radeon_fence_emit()
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| /Linux-v5.4/drivers/net/wireless/broadcom/b43/ |
| D | dma.c | 72 struct b43_dmadesc_generic *op32_idx2desc(struct b43_dmaring *ring, in op32_idx2desc() argument
78 *meta = &(ring->meta[slot]); in op32_idx2desc()
79 desc = ring->descbase; in op32_idx2desc()
85 static void op32_fill_descriptor(struct b43_dmaring *ring, in op32_fill_descriptor() argument
90 struct b43_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
97 B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
99 addr = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW); in op32_fill_descriptor()
100 addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT); in op32_fill_descriptor()
103 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
118 static void op32_poke_tx(struct b43_dmaring *ring, int slot) in op32_poke_tx() argument
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| /Linux-v5.4/drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_ring2.c | 12 static void xgene_enet_ring_init(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_init() argument
14 u32 *ring_cfg = ring->state; in xgene_enet_ring_init()
15 u64 addr = ring->dma; in xgene_enet_ring_init()
17 if (xgene_enet_ring_owner(ring->id) == RING_OWNER_CPU) { in xgene_enet_ring_init()
18 ring_cfg[0] |= SET_VAL(X2_INTLINE, ring->id & RING_BUFNUM_MASK); in xgene_enet_ring_init()
27 ring_cfg[3] |= SET_VAL(RINGSIZE, ring->cfgsize) in xgene_enet_ring_init()
34 static void xgene_enet_ring_set_type(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_type() argument
36 u32 *ring_cfg = ring->state; in xgene_enet_ring_set_type()
40 is_bufpool = xgene_enet_is_bufpool(ring->id); in xgene_enet_ring_set_type()
47 static void xgene_enet_ring_set_recombbuf(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_recombbuf() argument
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| /Linux-v5.4/drivers/thunderbolt/ |
| D | nhi.c | 25 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring") argument
43 static int ring_interrupt_index(struct tb_ring *ring) in ring_interrupt_index() argument
45 int bit = ring->hop; in ring_interrupt_index()
46 if (!ring->is_tx) in ring_interrupt_index()
47 bit += ring->nhi->hop_count; in ring_interrupt_index()
56 static void ring_interrupt_active(struct tb_ring *ring, bool active) in ring_interrupt_active() argument
59 ring_interrupt_index(ring) / 32 * 4; in ring_interrupt_active()
60 int bit = ring_interrupt_index(ring) & 31; in ring_interrupt_active()
64 if (ring->irq > 0) { in ring_interrupt_active()
69 if (ring->is_tx) in ring_interrupt_active()
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| /Linux-v5.4/net/rds/ |
| D | ib_ring.c | 66 void rds_ib_ring_init(struct rds_ib_work_ring *ring, u32 nr) in rds_ib_ring_init() argument
68 memset(ring, 0, sizeof(*ring)); in rds_ib_ring_init()
69 ring->w_nr = nr; in rds_ib_ring_init()
70 rdsdebug("ring %p nr %u\n", ring, ring->w_nr); in rds_ib_ring_init()
73 static inline u32 __rds_ib_ring_used(struct rds_ib_work_ring *ring) in __rds_ib_ring_used() argument
78 diff = ring->w_alloc_ctr - (u32) atomic_read(&ring->w_free_ctr); in __rds_ib_ring_used()
79 BUG_ON(diff > ring->w_nr); in __rds_ib_ring_used()
84 void rds_ib_ring_resize(struct rds_ib_work_ring *ring, u32 nr) in rds_ib_ring_resize() argument
88 BUG_ON(__rds_ib_ring_used(ring)); in rds_ib_ring_resize()
89 ring->w_nr = nr; in rds_ib_ring_resize()
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| /Linux-v5.4/drivers/gpu/drm/msm/ |
| D | msm_ringbuffer.c | 13 struct msm_ringbuffer *ring; in msm_ringbuffer_new() local
20 ring = kzalloc(sizeof(*ring), GFP_KERNEL); in msm_ringbuffer_new()
21 if (!ring) { in msm_ringbuffer_new()
26 ring->gpu = gpu; in msm_ringbuffer_new()
27 ring->id = id; in msm_ringbuffer_new()
29 ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ, in msm_ringbuffer_new()
30 MSM_BO_WC, gpu->aspace, &ring->bo, &ring->iova); in msm_ringbuffer_new()
32 if (IS_ERR(ring->start)) { in msm_ringbuffer_new()
33 ret = PTR_ERR(ring->start); in msm_ringbuffer_new()
34 ring->start = 0; in msm_ringbuffer_new()
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| /Linux-v5.4/drivers/crypto/qat/qat_common/ |
| D | adf_transport.c | 80 static int adf_reserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_reserve_ring() argument
83 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
87 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
92 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_unreserve_ring() argument
95 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
99 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) in adf_enable_ring_irq() argument
102 bank->irq_mask |= (1 << ring); in adf_enable_ring_irq()
109 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) in adf_disable_ring_irq() argument
112 bank->irq_mask &= ~(1 << ring); in adf_disable_ring_irq()
117 int adf_send_message(struct adf_etr_ring_data *ring, uint32_t *msg) in adf_send_message() argument
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| /Linux-v5.4/tools/testing/selftests/net/ |
| D | psock_tpacket.c | 66 struct ring { struct
71 void (*walk)(int sock, struct ring *ring); argument
220 static void walk_v1_v2_rx(int sock, struct ring *ring) in walk_v1_v2_rx() argument
227 bug_on(ring->type != PACKET_RX_RING); in walk_v1_v2_rx()
239 while (__v1_v2_rx_kernel_ready(ring->rd[frame_num].iov_base, in walk_v1_v2_rx()
240 ring->version)) { in walk_v1_v2_rx()
241 ppd.raw = ring->rd[frame_num].iov_base; in walk_v1_v2_rx()
243 switch (ring->version) { in walk_v1_v2_rx()
260 __v1_v2_rx_user_ready(ppd.raw, ring->version); in walk_v1_v2_rx()
262 frame_num = (frame_num + 1) % ring->rd_num; in walk_v1_v2_rx()
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| /Linux-v5.4/drivers/net/ethernet/mellanox/mlx4/ |
| D | en_tx.c | 54 struct mlx4_en_tx_ring *ring; in mlx4_en_create_tx_ring() local
58 ring = kzalloc_node(sizeof(*ring), GFP_KERNEL, node); in mlx4_en_create_tx_ring()
59 if (!ring) { in mlx4_en_create_tx_ring()
64 ring->size = size; in mlx4_en_create_tx_ring()
65 ring->size_mask = size - 1; in mlx4_en_create_tx_ring()
66 ring->sp_stride = stride; in mlx4_en_create_tx_ring()
67 ring->full_size = ring->size - HEADROOM - MAX_DESC_TXBBS; in mlx4_en_create_tx_ring()
70 ring->tx_info = kvmalloc_node(tmp, GFP_KERNEL, node); in mlx4_en_create_tx_ring()
71 if (!ring->tx_info) { in mlx4_en_create_tx_ring()
77 ring->tx_info, tmp); in mlx4_en_create_tx_ring()
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| /Linux-v5.4/drivers/net/ethernet/aquantia/atlantic/ |
| D | aq_vec.c | 26 struct aq_ring_s ring[AQ_CFG_TCS_MAX][2]; member
36 struct aq_ring_s *ring = NULL; in aq_vec_poll() local
45 for (i = 0U, ring = self->ring[0]; in aq_vec_poll()
46 self->tx_rings > i; ++i, ring = self->ring[i]) { in aq_vec_poll()
50 &ring[AQ_VEC_TX_ID]); in aq_vec_poll()
55 if (ring[AQ_VEC_TX_ID].sw_head != in aq_vec_poll()
56 ring[AQ_VEC_TX_ID].hw_head) { in aq_vec_poll()
57 was_tx_cleaned = aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]); in aq_vec_poll()
58 aq_ring_update_queue_state(&ring[AQ_VEC_TX_ID]); in aq_vec_poll()
62 &ring[AQ_VEC_RX_ID]); in aq_vec_poll()
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| /Linux-v5.4/drivers/crypto/inside-secure/ |
| D | safexcel_ring.c | 46 struct safexcel_desc_ring *ring) in safexcel_ring_next_wptr() argument
48 void *ptr = ring->write; in safexcel_ring_next_wptr()
50 if ((ring->write == ring->read - ring->offset) || in safexcel_ring_next_wptr()
51 (ring->read == ring->base && ring->write == ring->base_end)) in safexcel_ring_next_wptr()
54 if (ring->write == ring->base_end) in safexcel_ring_next_wptr()
55 ring->write = ring->base; in safexcel_ring_next_wptr()
57 ring->write += ring->offset; in safexcel_ring_next_wptr()
63 struct safexcel_desc_ring *ring) in safexcel_ring_next_rptr() argument
65 void *ptr = ring->read; in safexcel_ring_next_rptr()
67 if (ring->write == ring->read) in safexcel_ring_next_rptr()
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| /Linux-v5.4/drivers/net/ethernet/intel/iavf/ |
| D | iavf_trace.h | 62 TP_PROTO(struct iavf_ring *ring,
66 TP_ARGS(ring, desc, buf),
76 __field(void*, ring)
79 __string(devname, ring->netdev->name)
83 __entry->ring = ring;
86 __assign_str(devname, ring->netdev->name);
91 __get_str(devname), __entry->ring,
97 TP_PROTO(struct iavf_ring *ring,
101 TP_ARGS(ring, desc, buf));
105 TP_PROTO(struct iavf_ring *ring,
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| /Linux-v5.4/drivers/net/ethernet/intel/i40e/ |
| D | i40e_trace.h | 62 TP_PROTO(struct i40e_ring *ring,
66 TP_ARGS(ring, desc, buf),
76 __field(void*, ring)
79 __string(devname, ring->netdev->name)
83 __entry->ring = ring;
86 __assign_str(devname, ring->netdev->name);
91 __get_str(devname), __entry->ring,
97 TP_PROTO(struct i40e_ring *ring,
101 TP_ARGS(ring, desc, buf));
105 TP_PROTO(struct i40e_ring *ring,
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