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Searched refs:mt76_set (Results 1 – 25 of 30) sorted by relevance

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/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt76x2/
Dpci_init.c22 mt76_set(dev, MT_PBF_SYS_CTRL, val); in mt76x2_mac_pbf_init()
54 mt76_set(dev, MT_XO_CTRL6, MT_XO_CTRL6_C2_CTRL); in mt76x2_fixup_xtal()
100 mt76_set(dev, MT_EXT_CCA_CFG, 0x0000f000); in mt76x2_mac_reset()
168 mt76_set(dev, 0x10130, BIT(0) | BIT(16)); in mt76x2_power_on_rf_patch()
172 mt76_set(dev, 0x1001c, 0x30); in mt76x2_power_on_rf_patch()
177 mt76_set(dev, 0x10130, BIT(17)); in mt76x2_power_on_rf_patch()
183 mt76_set(dev, 0x1014c, BIT(19) | BIT(20)); in mt76x2_power_on_rf_patch()
192 mt76_set(dev, 0x10130, BIT(0) << shift); in mt76x2_power_on_rf()
196 mt76_set(dev, 0x10130, (BIT(1) | BIT(3) | BIT(4) | BIT(5)) << shift); in mt76x2_power_on_rf()
205 mt76_set(dev, 0x530, 0xf); in mt76x2_power_on_rf()
[all …]
Dusb_init.c30 mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) | BIT(16)); in mt76x2u_power_on_rf_patch()
34 mt76_set(dev, MT_VEND_ADDR(CFG, 0x1c), 0x30); in mt76x2u_power_on_rf_patch()
39 mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(17)); in mt76x2u_power_on_rf_patch()
45 mt76_set(dev, MT_VEND_ADDR(CFG, 0x14c), BIT(19) | BIT(20)); in mt76x2u_power_on_rf_patch()
54 mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) << shift); in mt76x2u_power_on_rf()
58 mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), val); in mt76x2u_power_on_rf()
67 mt76_set(dev, 0x530, 0xf); in mt76x2u_power_on_rf()
75 mt76_set(dev, MT_VEND_ADDR(CFG, 0x148), in mt76x2u_power_on()
90 mt76_set(dev, MT_VEND_ADDR(CFG, 0x148), 0xf << 24); in mt76x2u_power_on()
97 mt76_set(dev, MT_VEND_ADDR(CFG, 0x80), BIT(0)); in mt76x2u_power_on()
Dusb_mac.c44 mt76_set(dev, MT_VEND_ADDR(CFG, MT_XO_CTRL6), MT_XO_CTRL6_C2_CTRL); in mt76x2u_mac_fixup_xtal()
97 mt76_set(dev, MT_EXT_CCA_CFG, 0xf000); in mt76x2u_mac_reset()
170 mt76_set(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2u_mac_stop()
173 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2u_mac_stop()
Dmac.c37 mt76_set(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2_mac_stop()
40 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2_mac_stop()
Dusb_phy.c145 mt76_set(dev, MT_BBP(RXO, 13), BIT(10)); in mt76x2u_phy_set_channel()
167 mt76_set(dev, MT_BBP(TXO, 4), BIT(25)); in mt76x2u_phy_set_channel()
168 mt76_set(dev, MT_BBP(RXO, 13), BIT(8)); in mt76x2u_phy_set_channel()
Dpci_phy.c104 mt76_set(dev, MT_BBP(IBI, 9), BIT(11)); in mt76x2_phy_set_antenna()
105 mt76_set(dev, MT_BBP(TXBE, 5), 3); in mt76x2_phy_set_antenna()
210 mt76_set(dev, MT_BBP(RXO, 13), BIT(10)); in mt76x2_phy_set_channel()
Dpci_mcu.c134 mt76_set(dev, MT_MCU_COM_REG0, BIT(30)); in mt76pci_load_firmware()
Dusb_mcu.c224 mt76_set(dev, MT_MCU_COM_REG0, BIT(1)); in mt76x2u_mcu_load_firmware()
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt7603/
Dbeacon.c171 mt76_set(dev, MT_ARB_SCR, MT_ARB_SCR_TBTT_BCAST_PRIO); in mt7603_beacon_set_timer()
175 mt76_set(dev, MT_HW_INT_MASK(3), in mt7603_beacon_set_timer()
178 mt76_set(dev, MT_WF_ARB_BCN_START, in mt7603_beacon_set_timer()
185 mt76_set(dev, MT_LPON_SBTOR(0), MT_LPON_SBTOR_SUB_BSS_EN); in mt7603_beacon_set_timer()
Dmac.c25 mt76_set(dev, MT_WF_ARB_TX_STOP_0, mt7603_ac_queue_mask0(mask)); in mt76_stop_tx_ac()
31 mt76_set(dev, MT_WF_ARB_TX_START_0, mt7603_ac_queue_mask0(mask)); in mt76_start_tx_ac()
51 mt76_set(dev, MT_ARB_SCR, in mt7603_mac_set_timing()
135 mt76_set(dev, addr + 0 * 4, w0); in mt7603_wtbl_init()
136 mt76_set(dev, addr + 1 * 4, w1); in mt7603_wtbl_init()
137 mt76_set(dev, addr + 2 * 4, MT_WTBL1_W2_ADMISSION_CONTROL); in mt7603_wtbl_init()
236 mt76_set(dev, MT_WTBL1_OR, MT_WTBL1_OR_PSM_WRITE); in mt7603_wtbl_set_ps()
274 mt76_set(dev, MT_WTBL1_OR, MT_WTBL1_OR_PSM_WRITE); in mt7603_wtbl_clear()
705 mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_MODE); /* TSF read */ in mt7603_wtbl_set_rates()
1184 mt76_set(dev, MT_MCU_DEBUG_RESET, MT_MCU_DEBUG_RESET_PSE); in mt7603_pse_reset()
[all …]
Dinit.c108 mt76_set(dev, MT_SCH_4, BIT(6)); in mt7603_dma_sched_init()
178 mt76_set(dev, MT_WF_RMACDR, MT_WF_RMACDR_MAXLEN_20BIT); in mt7603_mac_init()
183 mt76_set(dev, MT_TMAC_TCR, MT_TMAC_TCR_RX_RIFS_MODE); in mt7603_mac_init()
189 mt76_set(dev, addr + MT_CLIENT_RXINF, MT_CLIENT_RXINF_RXSH_GROUPS); in mt7603_mac_init()
192 mt76_set(dev, MT_DMA_DCR1, GENMASK(13, 11)); in mt7603_mac_init()
195 mt76_set(dev, MT_TMAC_PCR, MT_TMAC_PCR_SPE_EN); in mt7603_mac_init()
256 mt76_set(dev, MT_WTBL_RMVTCR, MT_WTBL_RMVTCR_RX_MV_MODE); in mt7603_mac_init()
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt7615/
Ddma.c147 mt76_set(dev, 0x7158, BIT(16)); in mt7615_dma_init()
195 mt76_set(dev, MT_WPDMA_GLO_CFG, in mt7615_dma_init()
210 mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_SW_RESET); in mt7615_dma_cleanup()
Dmac.c590 mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_MODE); /* TSF read */ in mt7615_mac_set_rates()
1100 mt76_set(dev, MT_WF_PHY_B0_MIN_PRI_PWR, in mt7615_mac_set_scs()
1103 mt76_set(dev, MT_MIB_M0_MISC_CR, 0x7 << 8); in mt7615_mac_set_scs()
1104 mt76_set(dev, MT_MIB_M0_MISC_CR, 0x7); in mt7615_mac_set_scs()
1123 mt76_set(dev, MT_WF_PHY_R0_B0_PHYMUX_5, BIT(22) | BIT(20)); in mt7615_mac_cca_stats_reset()
Dinit.c26 mt76_set(dev, MT_CFG_CCR, in mt7615_mac_init()
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/
Dmt76x02_phy.c41 mt76_set(dev, MT_BBP(TXBE, 5), 0x3); in mt76x02_phy_set_txdac()
155 mt76_set(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_2G); in mt76x02_phy_set_band()
160 mt76_set(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_5G); in mt76x02_phy_set_band()
Dmt76x02_beacon.c53 mt76_set(dev, MT_BCN_BYPASS_MASK, BIT(bcn_idx)); in __mt76x02_mac_set_beacon()
129 mt76_set(dev, MT_BEACON_TIME_CFG, in mt76x02_mac_set_beacon_enable()
252 mt76_set(dev, MT_BEACON_TIME_CFG, MT_BEACON_TIME_CFG_SYNC_MODE); in mt76x02_init_beacon_config()
Dmt76x02_mac.c225 mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT); in mt76x02_mac_set_short_preamble()
974 mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); in mt76x02_check_mac_err()
986 mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX); in mt76x02_edcca_tx_enable()
987 mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_EN); in mt76x02_edcca_tx_enable()
1015 mt76_set(dev, MT_TXOP_CTRL_CFG, MT_TXOP_ED_CCA_EN); in mt76x02_edcca_init()
1018 mt76_set(dev, MT_TXOP_HLDR_ET, MT_TXOP_HLDR_TX40M_BLK_EN); in mt76x02_edcca_init()
1020 mt76_set(dev, MT_TX_LINK_CFG, MT_TX_CFACK_EN); in mt76x02_edcca_init()
1024 mt76_set(dev, MT_TXOP_HLDR_ET, in mt76x02_edcca_init()
Dmt76x02_mmio.c320 mt76_set(dev, MT_WPDMA_GLO_CFG, val); in mt76x02_dma_enable()
473 mt76_set(dev, 0x734, 0x3); in mt76x02_watchdog_reset()
487 mt76_set(dev, MT_TXOP_CTRL_CFG, MT_TXOP_ED_CCA_EN); in mt76x02_watchdog_reset()
490 mt76_set(dev, MT_BEACON_TIME_CFG, in mt76x02_watchdog_reset()
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt76x0/
Dpci.c129 mt76_set(dev, MT_XO_CTRL7, 0xc03); in mt76x0e_register_device()
133 mt76_set(dev, MT_MAX_LEN_CFG, BIT(13)); in mt76x0e_register_device()
Dphy.c370 mt76_set(dev, MT_RF_MISC, BIT(2)); in mt76x0_phy_set_chan_rf_params()
372 mt76_set(dev, MT_RF_MISC, BIT(3)); in mt76x0_phy_set_chan_rf_params()
516 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x0_phy_tssi_dc_calibrate()
534 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x0_phy_tssi_dc_calibrate()
997 mt76_set(dev, MT_BBP(CORE, 1), 0x20); in mt76x0_phy_set_channel()
Dusb_mcu.c127 mt76_set(dev, MT_USB_DMA_CFG, in mt76x0u_load_firmware()
Dinit.c138 mt76_set(dev, MT_EXT_CCA_CFG, 0xf000); in mt76x0_init_mac_registers()
/Linux-v5.4/drivers/net/wireless/mediatek/mt7601u/
Dmain.c249 mt76_set(dev, MT_WCID_DROP(idx), MT_WCID_DROP_MASK(idx)); in mt7601u_sta_remove()
361 mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid)); in mt76_ampdu_action()
Dmac.c262 mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT); in mt7601u_mac_set_short_preamble()
296 mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); in mt7601u_check_mac_err()
Dmt7601u.h316 static inline u32 mt76_set(struct mt7601u_dev *dev, u32 offset, u32 val) in mt76_set() function

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