| /Linux-v5.4/drivers/tty/serial/ |
| D | amba-pl011.c | 266 unsigned int dmacr; /* dma control reg */ member
553 u16 dmacr; in pl011_dma_tx_callback() local
560 dmacr = uap->dmacr; in pl011_dma_tx_callback()
561 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
562 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
573 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
675 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
676 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
711 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
712 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
[all …]
|
| /Linux-v5.4/drivers/ata/ |
| D | sata_dwc_460ex.c | 71 u32 dmacr; /* DMA Control */ member
721 u32 dmacr = sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr); in sata_dwc_clear_dmacr() local
724 dmacr = SATA_DWC_DMACR_RX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
725 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
727 dmacr = SATA_DWC_DMACR_TX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
728 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
736 __func__, tag, hsdevp->dma_pending[tag], dmacr); in sata_dwc_clear_dmacr()
737 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_clear_dmacr()
763 sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr)); in sata_dwc_dma_xfer_complete()
772 sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr)); in sata_dwc_dma_xfer_complete()
[all …]
|
| /Linux-v5.4/drivers/crypto/ux500/cryp/ |
| D | cryp_irqp.h | 89 u32 dmacr; /* Dma control register */ member
|
| D | cryp.h | 185 u32 dmacr; member
|
| D | cryp.c | 199 CRYP_SET_BITS(&device_data->base->dmacr, in cryp_configure_for_dma()
|
| D | cryp_core.c | 380 writel_relaxed(CRYP_DMACR_DEFAULT, &device_data->base->dmacr); in cryp_setup_context()
|
| /Linux-v5.4/include/linux/platform_data/ |
| D | video-imxfb.h | 64 u_int dmacr; member
|
| /Linux-v5.4/include/linux/fsl/ |
| D | guts.h | 106 u32 dmacr; /* 0x.0908 - DMA Control Register */ member
160 clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift); in guts_set_dmacr()
|
| /Linux-v5.4/drivers/dma/xilinx/ |
| D | xilinx_dma.c | 2110 u32 dmacr; in xilinx_vdma_channel_set_config() local
2115 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_channel_set_config()
2124 dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2126 dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2127 dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; in xilinx_vdma_channel_set_config()
2128 dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; in xilinx_vdma_channel_set_config()
2143 dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; in xilinx_vdma_channel_set_config()
2144 dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; in xilinx_vdma_channel_set_config()
2149 dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; in xilinx_vdma_channel_set_config()
2150 dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; in xilinx_vdma_channel_set_config()
[all …]
|
| /Linux-v5.4/drivers/video/fbdev/ |
| D | imxfb.c | 167 u_int dmacr; member
647 if (fbi->dmacr) in imxfb_activate_var()
648 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); in imxfb_activate_var()
694 fbi->dmacr = pdata->dmacr; in imxfb_init_fbinfo()
709 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); in imxfb_init_fbinfo()
|
| /Linux-v5.4/drivers/spi/ |
| D | spi-rockchip.c | 467 u32 dmacr = 0; in rockchip_spi_config() local
504 dmacr |= TF_DMA_EN; in rockchip_spi_config()
506 dmacr |= RF_DMA_EN; in rockchip_spi_config()
523 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
|
| D | spi-pl022.c | 420 u16 dmacr; member
567 writew(chip->dmacr, SSP_DMACR(pl022->virtbase)); in restore_state()
1975 chip->dmacr = 0; in pl022_setup()
1981 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1983 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1988 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
1990 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
|
| /Linux-v5.4/Documentation/devicetree/bindings/display/imx/ |
| D | fsl,imx-fb.txt | 21 - fsl,dmacr: DMA Control Register value. This is optional. By default, the
|
| /Linux-v5.4/arch/arm/mach-imx/ |
| D | mach-mx21ads.c | 248 .dmacr = 0x00020008,
|
| D | mach-mx27ads.c | 292 .dmacr = 0x00020010,
|
| D | mach-pca100.c | 337 .dmacr = 0x00020010,
|
| D | mach-mx27_3ds.c | 350 .dmacr = 0x00020010,
|
| /Linux-v5.4/arch/arm/boot/dts/ |
| D | imx27-apf27dev.dts | 101 fsl,dmacr = <0x00020010>;
|
| D | imx27-eukrea-mbimxsd27-baseboard.dts | 98 fsl,dmacr = <0x00040060>;
|
| D | imx27-phytec-phycore-rdk.dts | 77 fsl,dmacr = <0x00020010>;
|
| D | imx25-pdk.dts | 252 fsl,dmacr = <0x00020010>;
|
| /Linux-v5.4/drivers/dma/ |
| D | mpc512x_dma.c | 95 u32 dmacr; /* DMA control register */ member
1022 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA); in mpc_dma_probe()
1033 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG | in mpc_dma_probe()
|
| /Linux-v5.4/drivers/net/ethernet/intel/i40e/ |
| D | i40e_adminq_cmd.h | 450 __le32 dmacr; member
|
